EM357-RTR datasheet(58/241 Pages) SILABS

58 / 241 page

Rev 1.3

7.11. Registers

Note:

Substitute “A”, “B”, or “C” for “x” in the following detailed descriptions.

GPIO_PACFGL: Address: 0x4000B000 Reset: 0x4444



GPIO_PBCFGL: Address: 0x4000B400 Reset: 0x4444



GPIO_PCCFGL: Address: 0x4000B800 Reset: 0x4444



GPIO_PACFGL: Port A Configuration Register (Low)



GPIO_PBCFGL: Port B Configuration Register (Low)



GPIO_PCCFGL: Port C Configuration Register (Low)

Bit

Name

Bit

Name

Bit

Name

Px3_CFG

Px2_CFG

Bit

Name

Px1_CFG

Px0_CFG

Bitname

Bitfield

Access

Description

Px3_CFG

[15:12]

GPIO configuration control.

0x0: Analog, input or output (GPIO_PxIN always reads 1).

0x1: Output, push-pull (GPIO_PxOUT controls the output).

0x4: Input, floating.

0x5: Output, open-drain (GPIO_PxOUT controls the output).

0x8: Input, pulled up or down (selected by GPIO_PxOUT: 0 = pull-down,

1 = pull-up).

0x9: Alternate output, push-pull (peripheral controls the output).

0xD: Alternate output, open-drain (peripheral controls the output).

Px2_CFG

[11:8]

GPIO configuration control: see Px3_CFG above.

Px1_CFG

[7:4]

GPIO configuration control: see Px3_CFG above.

Px0_CFG

[3:0]

GPIO configuration control: see Px3_CFG above.

EM357-RTR Datasheet(PDF) 58 Page - Silicon Laboratories

EM357-RTR Datasheet(HTML) 58 Page - Silicon Laboratories

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