LP3907TL-JSXSSLASHNOPB datasheet(38/58 Pages) TI1

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LP3907

SNVS511S – JUNE 2007 – REVISED APRIL 2016

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D7-D5

D3-D2

Name

—

BP_UVLO

TPOR

BK_SLOMOD

BK_SSEN

Access

—

R/W

R/w

R/W

Data

Reserved

Bypass UVLO

monitoring

0 - Allow UVLO

1 - Disable UVLO

nPOR Delay Timing

00 - 50 µs

01 - 50 ms

10 - 100 ms

11 - 200 ms

Buck Spread Spectrum

Modulation

0 – 10 kHz triangular wave

1 – 2 kHz triangular wave

Spread Spectrum

Function Output

0 – Disabled

1 – Enabled

Reset

000

Factory-Programmed

Default

8.6.1.14 LDO1 Control Register (LDO1VCR) – 0x39

This register allows the user to program the output target voltage of LDO 1.

For “JJ11” voltage options LDO1 has a fixed output voltage of 2.85 V.

D7-D5

D4-D0

Name

—

LDO1_OUT

Access

—

R/W

Data

Reserved

LDO1 Output voltage (V)

5’h00

1.0

5’h01

1.1

5’h02

1.2

5’h03

1.3

5’h04

1.4

5’h05

1.5

5’h06

1.6

5’h07

1.7

5’h08

1.8

5’h09

1.9

5’h0A

2.0

5’h0B

2.1

5’h0C

2.2

5’h0D

2.3

5’h0E

2.4

5’h0F

2.5

5’h10

2.6

5’h11

2.7

5’h12

2.8

5’h13

2.9

5’h14

3.0

5’h15

3.1

5’h16

3.2

5’h17

3.3

5’h18

3.4

5’h19

3.5

5’h1A–5’h1F

3.5

Reset

000

Factory-Programmed Default

LP3907TL-JSXS/NOPB Datasheet(PDF) 38 Page - Texas Instruments

LP3907TL-JSXS/NOPB Datasheet(HTML) 38 Page - Texas Instruments

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