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M37207M8-059SP Datasheet(PDF) 25 Page - Mitsubishi Electric Semiconductor |
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M37207M8-059SP Datasheet(HTML) 25 Page - Mitsubishi Electric Semiconductor |
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25 / 121 page ![]() MITSUBISHI MICROCOMPUTERS M37207MF-XXXSP/FP, M37207M8-XXXSP M37207EFSP/FP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER and ON-SCREEN DISPLAY CONTROLLER 25 SERIAL I/O This microcomputer has a built-in serial I/O which can either transmit or receive 8-bit data serially in clock synchronous mode. The serial I/O block diagram is shown in Figure 18. The synchronous clock I/O pin (SCLK), and data I/O pins (SOUT, SIN), receive enable ____ signal output pin (SRDY) also function as port P4. Bit 2 of the serial I/O mode register (address 00DE16) selects whether the synchronous clock is supplied internally or externally (from the pins SCLK1, SCLK2). When an internal clock is selected, bits 1 and 0 select whether f(XIN) or f(XCIN) is divided by 8, 16, 32, or 64. To use pins for serial I/O, set the corresponding bits of the port P4 direction register (address 00C916) to “0.” The operation of the serial I/O is described below. The operation differs depending on the clock source; external clock or internal clock. Fig. 18. Serial I/O Block Diagram 8 Serial I/O shift register (8) Data bus Serial I/O interrupt request Selection gate : Connected to black side at reset. Synchronous circuit Frequency divider 1/8 1/4 1/16 SM1 SM0 Serial I/O counter (8) SM5 : LSB MSB S SM2 1/2 XIN 1/2 (Address 00DF16) XCIN CM7 1/2 (Note) Note : When the data is set in the serial I/O register (address 00DF 16), the register functions as the serial I/O shift register. P43 latch SM6 SCL2 CSIO SRDY2 SCLK2 SOUT2 SM4 P41 latch SM7 SCL3 SM3 CSIO P40 latch SM7 SDA3 SM3 CSIO SM6 P40 latch SDA2 SIN2 SRDY1 P47 latch SIC3 PWM8 SIC7 SCLK1 P45 latch SIC4 SCL1 SIC5 SOUT1 P44 latch SIC4 SDA1 SIC5 SIN1 SIC6 PWM9 P46 latch CSIO CM : CPU mode register SM : Serial I/O mode register SIC : Serial I/O control register CSIO : Bit 1 of serial I/O control register |
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