M37207M8-059SP datasheet(72/121 Pages) MITSUBISHI

72 / 121 page

MITSUBISHI MICROCOMPUTERS

M37207MF-XXXSP/FP, M37207M8-XXXSP

M37207EFSP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

and ON-SCREEN DISPLAY CONTROLLER

INTERRUPT INTERVAL DETERMINATION

FUNCTION

This microcomputer incorporates an interrupt interval determination

circuit. This interrupt interval determination circuit has an 8-bit binary

up counter as shown in Figure 69. Using this counter, it determines

an interval on the INT1 or INT2 (refer to Figure 72).

The following describes how the interrupt interval is determined.

1. The interrupt input to be determined (INT1 input or INT2 input) is

selected by using bit 2 in the interrupt interval determination con-

trol register (address 00D816). When this bit is cleared to “0,” the

INT1 input is selected ; when the bit is set to “1,” the INT2 input is

selected.

2. When the INT1 input is to be determined, the polarity is selected

by using bit 3 of the interrupt interval determination control

selected by using bit 4 of the interrupt interval determination

control register.

When the relevant bit is cleared to “0,” determination is made of

the interval of a positive polarity (rising transition) ; when the bit is

set to “1,” determination is made of the interval of a negative po-

larity (falling transition).

3. The reference clock is selected by using bit 1 of the interrupt inter-

val determination control register. When the bit is cleared to “0,” a

32 ms clock is selected ; when the bit is set to “1,” a 16 ms clock is

selected (based on an oscillation frequency of 8MHz in either

case).

4. Simultaneously when the input pulse of the specified polarity

(rising or falling transition) occurs on the INT1 pin (or INT2 pin),

the 8-bit binary up counter starts counting up with the selected

reference clock (32 ms or 16 ms).

5. Simultaneously with the next input pulse, the value of the 8-bit

binary up counter is loaded into the interrupt interval determina-

tion register (address 00D716) and the counter is immediately re-

set (“0016”). The reference clock is input in succession even after

the counter is reset, and the counter restarts counting up from

“0016.”

6. When count value “FE16” is reached, the 8-bit binary up counter

stops counting. Then, simultaneously when the next reference

clock is input, the counter sets value “FF16” to the interrupt inter-

val determination register. The reference clock is generated by

setting bit 0 of PWM mode register 1 to “0.”

Fig. 69. Block Diagram of Interrupt Interval Determination Circuit

Data bus

Control

circuit

Connected to

black colored

side at rest.

Selection gate :

(Address 00D716)

µs

RE1

µs

8-bit binary up counter (8)

Interrupt interval determination register (8)

RE0

INT1 (Note)

RE2

INT2 (Note)

Note: The pulse width of external interrupt INT1 and INT2 needs 5 or more machine cycles.

RE : Interrupt interval determination control register

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