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AM7968-125JC Datasheet(PDF) 40 Page - Advanced Micro Devices

Part # AM7968-125JC
Description  TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface)
PDF  127 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM7968-125JC Datasheet(HTML) 40 Page - Advanced Micro Devices

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AMD
36
Am7968/Am7969-125 Military
SWITCHING CHARACTERISTICS over operating range unless otherwise specified
(Note 20) (for CPL Products Group A, Subgroups 9, 10, and 11 are tested unless other-
wise noted)
Am7968-125 Military TAXIchip Transmitter (Notes 10, 13, 22)
Parameter
No.
Symbol
Parameter Description
Test Conditions
Min
Max
Units
Bus Interface Signals: DI0–DI7, DI8/CI3, DI9/CI2, CI0–CI1, STRB, ACK, CLK
1tP
CLK Period
8 n
25 n
ns
2tPW
CLK Pulse Width HIGH
25
ns
3tPW
CLK Pulse Width LOW
25
ns
4tPW
STRB Pulse Width HIGH (Note 7)
20
ns
5tPW
STRB Pulse Width LOW
20
ns
6tBB
Internal Byte Boundary to CLK
↓
25
ns
(Note 11)
9tS
Data–STRB Setup Time
10
ns
10
tH
Data–STRB Hold Time
15
ns
11
tH
ACK
↑ to STRB↓ Hold (Note 8)
TTL Output Load
0
ns
12
tH
ACK
↓ to STRB↑ Hold
TTL Output Load
0
ns
13
tPD
STRB
↑ to ACK↑ (Note 18)
TTL Output Load
45
ns
14
tPD
STRB
↓ to ACK↓
TTL Output Load
25
ns
15
tPD
CLK
↓ to ACK↑ (Note 18)
TTL Output Load
ns
Miscellaneous Signals: X1 (Note 15)
29
tPW
X1 Pulse Width HIGH (Note 12)
TTL Output Load on CLK
35
ns
30
tPW
X1 Pulse Width LOW (Note 12)
TTL Output Load on CLK
35
ns
32
tPD
X1
↑ to CLK↑
TTL Load
32
ns
33
tPD
X1
↓ to CLK↓
TTL Load
32
ns
3t1
n + 43
–9t1
8n +3



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