MPC8314EVRADDA datasheet(7/101 Pages) FREESCALE

7 / 101 page

MPC8314E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2

Freescale Semiconductor

Electrical Characteristics

2.13

DMA Controller, I2C, DUART, Enhanced Local Bus Controller

(eLBC), and Timers

The integrated four-channel DMA controller includes the following features:

•

Allows chaining (both extended and direct) through local memory-mapped chain descriptors

(accessible by local masters)

•

Misaligned transfer capability for source/destination address

•

Supports external DREQ, DACK and DONE signals

There is one I2C controller. This synchronous, multi-master buses can be connected to additional devices

for expansion and system development.

The DUART supports full-duplex operation and is compatible with the PC16450 and PC16550

programming models. 16-byte FIFOs are supported for both the transmitter and the receiver.

The eLBC port allows connections with a wide variety of external DSPs and ASICs. Three separate state

machines share the same external pins and can be programmed separately to access different types of

devices. The general-purpose chip select machine (GPCM) controls accesses to asynchronous devices

using a simple handshake protocol. The three user programmable machines (UPMs) can be programmed

to interface to synchronous devices or custom ASIC interfaces. Each chip select can be configured so that

the associated chip interface can be controlled by the GPCM or UPM controller. Both may exist in the

same system. The local bus can operate at up to 66 MHz.

The system timers include the following features: periodic interrupt timer, real time clock, software

watchdog timer, and two general-purpose timer blocks.

Electrical Characteristics

This section provides the AC and DC electrical specifications and thermal characteristics for the

MPC8314E, which is currently targeted to these specifications. Some of these specifications are

independent of the I/O cell, but they are included for complete reference. These are not purely I/O buffer

design specifications.

3.1

Overall DC Electrical Characteristics

This section covers the ratings, conditions, and other characteristics.

3.1.1

Absolute Maximum Ratings

This table provides the absolute maximum ratings.

Table 1. Absolute Maximum Ratings 1

Characteristic

Symbol

Max Value

Unit

Note

Core supply voltage

VDD

–0.3 to 1.26

—

PLL supply voltage

AVDD

–0.3 to 1.26

—

DDR1 DRAM I/O supply voltage

GVDD

–0.3 to 2.7

—

MPC8314EVRADDA Datasheet(PDF) 7 Page - Freescale Semiconductor, Inc

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