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MPC8314EVRADDA Datasheet(PDF) 26 Page - Freescale Semiconductor, Inc |
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MPC8314EVRADDA Datasheet(HTML) 26 Page - Freescale Semiconductor, Inc |
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26 / 101 page ![]() MPC8314E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2 26 Freescale Semiconductor Ethernet: Three-Speed Ethernet, MII Management 9.2.2 RMII AC Timing Specifications This section describes the RMII transmit and receive AC timing specifications. 9.2.2.1 RMII Transmit AC Timing Specifications This section describes the RMII transmit and receive AC timing specifications. This table provides the RMII transmit AC timing specifications. This figure shows the RMII transmit AC timing diagram. Figure 12. RMII Transmit AC Timing Diagram 9.2.2.2 RMII Receive AC Timing Specifications This table provides the RMII receive AC timing specifications. Table 27. RMII Transmit AC Timing Specifications At recommended operating conditions with LVDD of 3.3 V ± 300 mv Parameter/Condition Symbol 1 Min Typ Max Unit REF_CLK clock tRMX —20— ns REF_CLK duty cycle tRMXH/tRMX 35 — 65 % REF_CLK to RMII data TXD[1:0], TX_EN delay tRMTKHDX 2 — 10 ns REF_CLK data clock rise VIL(min) to VIH(max) tRMXR 1.0 — 4.0 ns REF_CLK data clock fall VIH(max) to VIL(min) tRMXF 1.0 — 4.0 ns Note: 1. The symbols used for timing specifications herein follow the pattern of t(first three letters of functional block)(signal)(state) (reference)(state) for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tRMTKHDX symbolizes RMII transmit timing (RMT) for the time tRMX clock reference (K) going high (H) until data outputs (D) are invalid (X). Note that, in general, the clock reference symbol representation is based on two to three letters representing the clock of a particular functional. For example, the subscript of tRMX represents the RMII(RM) reference (X) clock. For rise and fall times, the latter convention is used with the appropriate letter: R (rise) or F (fall). Table 28. RMII Receive AC Timing Specifications At recommended operating conditions with LVDD of 3.3 V ± 300 mv Parameter/Condition Symbol 1 Min Typ Max Unit REF_CLK clock period tRMX —20— ns REF_CLK duty cycle tRMXH/tRMX 35 — 65 % REF_CLK TXD[1:0] tRMTKHDX tRMX tRMXH tRMXR tRMXF TX_EN |
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