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R8C/13 Datasheet(PDF) 155 Page - Renesas Technology Corp |
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R8C/13 Datasheet(HTML) 155 Page - Renesas Technology Corp |
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155 / 224 page ![]() Rev.1.20 Jan 27, 2006 page 144 of 205 REJ09B0111-0120 R8C/13 Group 15. Programmable I/O Ports 15. Programmable I/O Ports Pull-up control register 0 Symbol Address After reset PUR0 00FC16 00XX00002 Bit nameFunction Bit symbol RW b7b6b5b4b3b2 b1b0 PU00P00 to P03 pull-up(1) PU01P04 to P07 pull-up(1) PU02P10 to P13 pull-up(1) PU06P30 to P33 pull-up(1) PU07P37 pull-up(1) Nothing is assigned. When write, set to “0”. When read, its content is indeterminate. (b5-b4) 0 : Not pulled high 1 : Pulled high(1) Pull-up control register 1 Symbol Address After reset PUR1 00FD16 XXXXXX0X2 Bit name Function Bit symbol b7b6b5b4b3b2 b1b0 PU11P45 pull-up(1) NOTES: 1. The pin for which this bit is “1” (pulled high) and the direction bit is “0” (input mode) is pulled high. RW RW RW PU03P14 to P17 pull-up(1) RW RW RW RW RW Port P1 drive capacity control register Symbol Address After reset DRR 00FE16 0016 Bit name Function Bit symbol b7b6b5 b4b3b2b1b0 DRR0 P10 drive capacity DRR1P11 drive capacity DRR2P12 drive capacity DRR3P13 drive capacity DRR4P14 drive capacity DRR5P15 drive capacity 0 : LOW 1 : HIGH RW RW RW RW RW RW RW 0 : Not pulled high 1 : Pulled high(1) 0 : Not pulled up 1 : Pulled up(1) Nothing is assigned. When write, set to “0”. When read, its content is indeterminate. (b0) Nothing is assigned. When write, set to “0”. When read, its content is indeterminate. (b7-b2) NOTES: 1. The P45 pin for which the PU11 bit is “1” (pulled high) and the PD4_5 bit is “0” (input mode) is pulled high. DRR6P16 drive capacity DRR7 P17 drive capacity RW RW Set P1 N-channel output transistor drive capacity Figure 15.9 PUR0 Register, PUR1 Register, and DRR Register |
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