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R8C/20 Datasheet(PDF) 144 Page - Renesas Technology Corp |
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R8C/20 Datasheet(HTML) 144 Page - Renesas Technology Corp |
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144 / 501 page ![]() R8C/20 Group, R8C/21 Group 14. Timers Rev.2.00 Aug 27, 2008 Page 128 of 458 REJ09B0250-0200 14.1.3 Event Counter Mode Event counter mode is mode to count an external signal which inputs from the INT1/TRAIO pin (see Table 14.4 Event Counter Mode Specifications). Figure 14.8 shows the TRAIOC Register in Event Counter Mode. NOTE: 1. The level of output pulse turn into the level when the pulse output starts by writing the TRAMR register. Table 14.4 Event Counter Mode Specifications Item Specification Count Source External signal which is input to TRAIO pin (active edge is selectable by a program) Count Operations • Decrement • When the timer underflows, the contents in the reload register is reloaded and the count is inherited Divide Ratio 1/(n+1)(m+1) n: setting value of TRAPRE register, m: setting value of TRA register Count Start Condition Write 1 (count starts) to the TSTART bit in the TRACR register Count Stop Conditions • Write 0 (count stops) to the TSTART bit in the TRACR register • Write 1 (count forcibly stops) to the TSTOP bit in the TRACR register Interrupt Request Generation Timing When timer RA underflows [timer RA interrupt] INT1/TRAIO Pin Function Count source input (INT1 interrupt input) TRAO Pin Function Programmable I/O port(1) Read from Timer The count value can be read by reading the TRA and TRAPRE registers Write to Timer • When registers TRAPRE and TRA are written while the count is stopped, values are written to both the reload register and counter. • When registers TRAPRE and TRA are written during the count, values are written to the reload register and counter (refer to 14.1.1.1 Timer Write Control during Count Operation). Select Functions •INT1 input polarity switch function The TEDGSEL bit in the TRAIOC register can select the active edge of the count source. • Count source input pin select function P1_7 or P1_5 is selected by the TIOSEL bit in the TRAIOC register. • Pulse output function The pulse which inverts the polarity can be output from the TRAO pin each time the timer underflows. (selected by the TOENA bit in the TRAIOC register)(1) • Digital filter function Bits TIPF0 and TIPF1 in the TRAIOC register enable or disable the digital filter and select the sampling frequency. |
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