LM65645 datasheet(8/66 Pages) TI2

8 / 66 page

6.5 Electrical Characteristics (continued)

Limits apply over the recommended operating junction temperature (TJ) range of –40°C to +150°C, unless otherwise stated.

Minimum and Maximum limits are specified through test, design or statistical correlation. Typical values represent the most

likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated, the following

conditions apply: VIN = 13.5V, VEN = VIN, VOUT = 3.3V, fSW = 2.2MHz

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

INTERNAL LDO (VCC PIN)

VVCC

Internal LDO output voltage

3.4V ≤ VIN ≤ 65V, VBIAS = 0V

3.35

3.4V ≤ VBIAS ≤ 30V

3.35

VVCC-UVLO_R

VCC UVLO rising threshold

VCC rising under voltage threshold, IVCC =

3.20

3.5

3.65

V VCC-UVLO_H

VCC UVLO hysteresis

Hysteresis below VVCC-UVLO_R

0.9

VOLTAGE REFERENCE (FB PIN)

VFB

Internal feedback reference voltage

FPWM Mode

0.792

0.8

0.808

IFB-LKG

Feedback pin input leakage current

VFB = 0.8V, adjustable version

0.025

RFB-SEL-5V

Resistance for fixed 5.0V setting from FB

pin to VCC

200

RFB-SEL-3V

Resistance for fixed 3.3V setting from FB

pin to GND

200

RFB-SEL-ADJ

Thevenin equivalent resistance of external

FB divider on FB pin to select adjustable

output voltage setting

100

kΩ

FIXED OUTPUT VOLTAGE (BIAS PIN)

VOUT(3.3V)

3.3V fixed output voltage

FB shorted to GND

3.267

3.3

3.333

VOUT(5V)

5.0V fixed output voltage

FB shorted to VCC

4.95

5.05

STARTUP (SS PIN)

tEN_HIGH

Enable HIGH to start of switching delay

VFB = VRT = VMODE = GND, VBIAS = VOUT

3.0

tSS

Internal fixed soft-start time

Time from first SW pulse to VREF at 90% of

set point

2.9

5.3

8.1

CURRENT LIMITS AND HICCUP

IHS-LIM

High side peak current limit, 4.5A trim option Duty cycle approaches 0%.

5.4

6.6

7.25

ILS-LIM

Low side valley current limit, 4.5A trim

option

Valley current limit on low-side FET

4.1

5.2

5.65

IL-PEAK-MIN

Minimum peak inductor current at minimum

duty cycle, 4.5A trim option

VVCC = 3.3V, tpulse ≤ 100ns, auto mode

1.21

1.57

1.92

IL-PEAK-MAX

Minimum peak inductor current at maximum

duty cycle, 4.5A Trim Option

VVCC = 3.3V, tpulse ≥ 1µs, auto mode

0.66

IHS-LIM

High side peak current limit, 3.5A trim option Duty-cycle approaches 0%.

4.8

5.45

5.9

ILS-LIM

Low side valley current limit, 3.5A trim

option

Valley current limit on low-side FET

3.5

4.4

4.85

IL-PEAK-MIN

Minimum peak inductor current at minimum

duty cycle, 3.5A trim option

VVCC = 3.3V, tpulse ≤ 100ns, auto mode

0.80

1.29

1.58

IL-PEAK-MAX

Minimum peak inductor current at maximum

duty cycle, 3.5A trim option

VVCC = 3.3V, tpulse ≥ 1µs, auto mode

0.52

IHS-LIM

High side peak current limit, 2.5A trim option Duty-cycle approaches 0%.

3.75

4.1

4.9

ILS-LIM

Low side valley current limit, 2.5A trim

option

Valley current limit on low-side FET

2.4

3.0

3.4

IL-PEAK-MIN

Minimum peak inductor current at minimum

duty cycle, 2.5A trim option

VVCC = 3.3V, tpulse ≤ 100ns, auto mode

0.8

1.1

1.35

IL-PEAK-MAX

Minimum peak inductor current at maximum

duty cycle, 2.5A trim option

VVCC = 3.3V, tpulse ≥ 1µs, auto mode

0.43

ILS-NEG-LIM

Low side negative current limit, All current

limit trim options

Sinking current limit on LS FET, FPWM

mode

–6

–4.3

–2.8

IL-ZC-LIM

Zero-cross current limit

VVCC = 3.3V, auto mode

VHIC

Overcurrent hiccup threshold on FB pin

LS FET on-time > 165ns, not during soft

start

0.32

tHIC_DLY

Hiccup mode activation delay

cycles

LM65625, LM65635, LM65645

SNVSCH3 – JUNE 2025

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