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ISL854102DEMO2Z Datasheet(PDF) 18 Page - Renesas Technology Corp |
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ISL854102DEMO2Z Datasheet(HTML) 18 Page - Renesas Technology Corp |
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18 / 21 page ![]() ISL854102 FN8870 Rev.1.00 Page 18 of 21 Mar 15, 2019 Layout Considerations Proper layout of the power converter minimizes EMI and noise, and ensures first pass success of the design. Printed Circuit Board (PCB) layouts are provided in multiple formats on the Renesas website. In addition, Figure 39 illustrates the important points in PCB layout. In reality, PCB layout of the ISL854102 is quite simple. A multilayer PCB with GND plane is recommended. Figure 39 shows the connections of the critical components in the converter. Note that capacitors CIN and COUT can each represent multiple physical capacitors. The most critical connections are to tie the PGND pin to the package GND pad and then use vias to directly connect the GND pad to the system GND plane. This connection of the GND pad to system plane ensures a low impedance path for all return current and an excellent thermal path to dissipate heat. With this connection made, place the high frequency MLCC input capacitor near the VIN pin and use vias directly at the capacitor pad to tie the capacitor to the system GND plane. The boot capacitor is easily placed on the PCB side opposite the controller IC and two vias directly connect the capacitor to BOOT and PHASE. Place a 1µF MLCC near the VCC pin and directly connect its return with a via to the system GND plane. Place the feedback divider close to the FB pin and do not route any feedback components near PHASE or BOOT. If external components are used for SS, COMP, or FS, the same advice applies. FIGURE 38. SIMULATED LOOP GAIN 60 45 30 15 0 -15 -30 100 1k 10k 100k 1M FREQUENCY (Hz) 180 150 120 90 60 30 0 100 1k 10k 100k 1M FREQUENCY (Hz) L1 COUT CVIN CSS RFS FIGURE 39. PRINTED CIRCUIT BOARD POWER PLANES AND ISLANDS RFS CSS CVIN L1 COUT 0.47” |
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