IS25WP064A-RBLE datasheet(42/111 Pages) ISSI

42 / 111 page

IS25WP064A/032A

Integrated Silicon Solution, Inc.- www.issi.com

Rev. 00D

03/01/2016

FAST READ QUAD I/O OPERATION IN QPI MODE (FRQIO, EBh)

The FRQIO instruction is also used in QPI mode to read memory data at up to a 133MHz clock.

The FRQIO instruction in QPI mode utilizes all four IO lines to input the instruction code so that only two clocks

are required, while the FRQIO instruction in SPI mode requires that the byte-long instruction code is shifted into

the device only via IO0 line in eight clocks. As a result, 6 command cycles will be reduced by the FRQIO

instruction in QPI mode. In addition, subsequent address and data out are shifted in/out via all four IO lines like

the FRQIO instruction. In fact, except for the command cycle, the FRQIO operation in QPI mode is exactly same

as the FRQIO operation in SPI mode.

The device supports the AX read operation by applying mode bits during dummy period. Mode bits consist of 8

bits, such as M7 to M0. Two cycles after address input are reserved for Mode bits in FRQIO QPI execution. M7 to

M4 are important for enabling this m

ode. M3 to M0 become don’t care for future use. When M[7:4]=1010(Ah), it

enables the AX read operation and subsequent FRQIO QPI execution skips command code. It saves cycles as

described in Figure 8.9. When the code is different from AXh (

where X is don’t care), the device exits the AX read

operation. After finishing the read operation, device becomes ready to receive a new command. SPI or QPI mode

configuration retains the prior setting. Mode bit must be applied during dummy cycles. Number of dummy cycles

in Table 6.11 includes number of mode bit cycles. If dummy cycles are configured as 6 cycles, data output will

start right after mode bits and 4 additional dummy cycles are applied.

If the FRQIO instruction is issued while an Erase, Program or Write cycle is in process (WIP=1) the instruction is

ignored and will not have any effects on the current cycle.

Figure 8.10 Fast Read Quad I/O Sequence In QPI Mode

EBh

CE#

SCK

IO[3:0]

6 Dummy Cycles

3-byte Address

...

Mode 3

Mode 0

23:20

7:4

3:0

7:4

3:0

Data 1

Data 2

19:16 15:12 11:8

7:4

3:0

...

Instruction

Mode Bits

7:4

3:0

...

Note: Number of dummy cycles depends on Read Parameter setting. Detailed information in Table 6.11 Read Dummy

Cycles.

IS25WP064A-RBLE Datasheet(PDF) 42 Page - Integrated Silicon Solution, Inc

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