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IS25WP064A-RBLE Datasheet(PDF) 23 Page - Integrated Silicon Solution, Inc

Part # IS25WP064A-RBLE
Description  1.8V SERIAL FLASH MEMORY WITH 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  111 Pages
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25WP064A-RBLE Datasheet(HTML) 23 Page - Integrated Silicon Solution, Inc

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IS25WP064A/032A
Integrated Silicon Solution, Inc.- www.issi.com
23
Rev. 00D
03/01/2016
WIP bit: The definition of the WIP bit is exactly same as the one of Status Register.
PROT_E bit: The Protection Error bit indicates whether an Erase or Program operation has attempted to modify
a protected array sector or block, or to access a locked Information Row region. When the bit is set t
o “1” it
indicates that there was an error or errors in previous Erase or Program operations. See Table 6.15 for details.
P_ERR bit: The Program Error bit indicates whether a Program or Write/Set OTP/Non-Volatile Register operation
has succeeded or failed, or whether a Program operation has attempted to program a protected array
sector/block or a locked Information Row region. When the bit is set to “1” it indicates that there was an error or
errors in previous Program or Write/Set Register operations. See Table 6.15 for details.
E_ERR bit: The Erase Error bit indicates whether an Erase or Write/Set OTP/Non-Volatile Register operation has
succeeded or failed, or whether an Erase operation has attempted to erase a protected array sector/block or a
locked In
formation Row region. When the bit is set to “1” it indicates that there was an error or errors in previous
Erase or Write/Set Non-Volatile Register operations. See Table 6.15 for details.
Table 6.15 Instructions to set PROT_E, P_ERR, or E_ERR bit
Instructions
Description
PP/PPQ
The commands will set the P_ERR if there is a failure in the operation. Attempting to
program within the protected array sector/block or within an erase suspended sector/block
will result in a programming error with P_ERR and PROT_E set to
“1”.
IRP
The command will set the P_ERR if there is a failure in the operation. In attempting to
program within a locked Information Row region, the operation will fail with P_ERR and
PROT_E set to 1.
WRSR/WRABR/SRPNV/
SERPNV
The update process for the non-volatile register bits involves an erase and a program
operation on the non-volatile register bits. If either the erase or program portion of the update
fails, the related error bit (P_ERR or E_ERR)
will be set to “1”.
Only for WRSR command, when Status Register is write-protected by SRWD bit and WP#
pin, attempting to write the register will set PROT_E and E_ERR to “1”.
WRFR
The commands will set the P_ERR if there is a failure in the operation.
SER/BER32K/BER64K/CER/
IRER
The commands will set the E_ERR if there is a failure in the operation. E_ERR and PROT_E
will be set to “1” when the user attempts to erase a protected main memory sector/block or a
locked Information Row region. However, the Chip Erase (CER) command will not set
E_ERR and PROT_E if a protected sector/block is found during the command execution.
Notes:
1.
OTP bits in the Function Register may only be programmed to “1”. Writing of the bits back to “0” is ignored and
no error is set.
2. Read only bits in registers are never modified by a command so that the corresponding bits in the Write/Set
Register command data byte are ignored without setting any error indication.
3.
Once the PROT_E, P_ERR, and E_ERR error bits are set to “1”, they remains set to “1” until they are cleared to
“0” with a Clear Extended Read Register (CLERP) command. This means that those error bits must be cleared
through the CLERP command. Alternatively, Hardware Reset, or Software Reset may be used to clear the bits.
4. Any further command will be executed even though the err
or bits are set to “1”.



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