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IS25WP064A-RBLE Datasheet(PDF) 21 Page - Integrated Silicon Solution, Inc |
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IS25WP064A-RBLE Datasheet(HTML) 21 Page - Integrated Silicon Solution, Inc |
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21 / 111 page ![]() IS25WP064A/032A Integrated Silicon Solution, Inc.- www.issi.com 21 Rev. 00D 03/01/2016 Table 6.10 Wrap Function Wrap around boundary P2 Whole array regardless of P1 and P0 value 0 Burst Length set by P1 and P0 1 Table 6.11 Read Dummy Cycles vs Max Frequency P[6:3] Dummy Cycles 2,3 Fast Read 5 0Bh Fast Read 5 0Bh Fast Read Dual Output 3Bh Fast Read Dual IO BBh Fast Read Quad Output 6Bh Fast Read Quad IO EBh FRDTR 0Dh FRDDTR BDh FRQDTR EDh SPI QPI SPI SPI SPI SPI, QPI SPI/QPI SPI 4 SPI, QPI 0 Default 1 133MHz 104MHz 133MHz 115MHz 133MHz 104MHz 66/66MHz 66MHz 66MHz 1 1 84MHz 33MHz 84MHz 60MHz 66MHz 33MHz 50/20MHz 33MHz 20MHz 2 2 104MHz 50MHz 104MHz 84MHz 80MHz 50MHz 66/33MHz 50MHz 33MHz 3 3 133MHz 60MHz 115MHz 104MHz 90MHz 60MHz 66/46MHz 66MHz 46MHz 4 4 133MHz 70MHz 133MHz 115MHz 104MHz 70MHz 66/60MHz 66MHz 60MHz 5 5 133MHz 84MHz 133MHz 133MHz 115MHz 84MHz 66/66MHz 66MHz 66MHz 6 6 133MHz 104MHz 133MHz 133MHz 133MHz 104MHz 66/66MHz 66MHz 66MHz 7 7 133MHz 115MHz 133MHz 133MHz 133MHz 115MHz 66/66MHz 66MHz 66MHz 8 8 133MHz 133MHz 133MHz 133MHz 133MHz 133MHz 66/66MHz 66MHz 66MHz 9 9 133MHz 133MHz 133MHz 133MHz 133MHz 133MHz 66/66MHz 66MHz 66MHz 10 10 133MHz 133MHz 133MHz 133MHz 133MHz 133MHz 66/66MHz 66MHz 66MHz 11 11 133MHz 133MHz 133MHz 133MHz 133MHz 133MHz 66/66MHz 66MHz 66MHz 12 12 133MHz 133MHz 133MHz 133MHz 133MHz 133MHz 66/66MHz 66MHz 66MHz 13 13 133MHz 133MHz 133MHz 133MHz 133MHz 133MHz 66/66MHz 66MHz 66MHz 14 14 133MHz 133MHz 133MHz 133MHz 133MHz 133MHz 66/66MHz 66MHz 66MHz 15 15 133MHz 133MHz 133MHz 133MHz 133MHz 133MHz 66/66MHz 66MHz 66MHz Notes: 1. Default dummy cycles are as follows. Operation Command Dummy Cycles Comment Normal mode DTR mode Normal mode DTR mode Fast Read SPI 0Bh 0Dh 8 8 RDUID, RDSFDP, IRRD instructions are also applied. Fast Read QPI 0Bh 0Dh 6 6 Fast Read Dual Output 3Bh - 8 - Fast Read Dual IO SPI BBh BDh 4 4 Fast Read Quad Output 6Bh - 8 - Fast Read Quad IO SPI, QPI EBh EDh 6 6 2. Enough number of dummy cycles must be applied to execute properly the AX read operation. 3. Must satisfy bus I/O contention. For instance, if the number of dummy cycles and AX bit cycles are same, then X must be Hi-Z. 4. QPI is not available for FRDDTR command. 5. RDUID, RDSFDP, IRRD instructions are also applied. |
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