CC1150-RTY1 datasheet(12/67 Pages) TI

12 / 67 page

CC1150

SWRS037A

Page 12 of 60

7.3

Crystal

A crystal in the frequency range 26-27 MHz

must be connected between the XOSC_Q1

and XOSC_Q2 pins. The oscillator is designed

for parallel mode operation of the crystal. In

addition, loading capacitors (C51 and C71) for

the crystal are required. The loading capacitor

values depend on the total load capacitance,

CL, specified for the crystal. The total load

capacitance

seen

between

the

crystal

terminals should equal CL for the crystal to

oscillate at the specified frequency.

parasitic

The parasitic capacitance is constituted by pin

input capacitance and PCB stray capacitance.

Total parasitic capacitance is typically 2.5 pF.

The crystal oscillator circuit is shown in Figure

3. Typical component values for different

values of CL are given in Table 12.

XOSC_Q1

XOSC_Q2

XTAL

C51

C71

Figure 3: Crystal Oscillator Circuit

The crystal oscillator is amplitude regulated.

This means that a high current is used to start

up the oscillations. When the amplitude builds

up, the current is reduced to what is necessary

to maintain approximately 0.4 Vpp signal

swing. This ensures a fast start-up, and keeps

the drive level to a minimum. The ESR of the

crystal should be within the specification in

order to ensure a reliable start-up (see section

4.3 on page 8).

The initial tolerance, temperature drift, aging

and load pulling should be carefully specified

in order to meet the required frequency

accuracy in a certain application.

Component

CL= 10 pF

CL=13 pF

CL=16 pF

C51

15 pF

22 pF

27 pF

C71

15 pF

22 pF

27 pF

Table 12: Crystal Oscillator Component Values

7.4

Reference signal

The chip can alternatively be operated with a

reference signal from 26 to 27 MHz instead of

a crystal. This input clock can either be a full-

swing digital signal (0 V to VDD) or a sine

wave of maximum 1 V peak-peak amplitude.

The reference signal must be connected to the

XOSC_Q1 input. The sine wave must be

connected to XOSC_Q1 using a serial

capacitor. The XOSC_Q2 line must be left un-

connected. C51 and C71 can be omitted when

using a reference signal.

7.5

Additional filtering

In the 868/915 MHz reference design, C106

and L105 together with C105 build an optional

filter to reduce emission at 699 MHz. This filter

may be necessary for applications seeking

compliance with ETSI EN 300-220, for more

information, see DN017 [6]. If this filtering is

not necessary, C105 will work as a DC block

(only necessary if there is a DC path in the

antenna). C106 and L105 should in that case

be left unmounted.

Additional external components (e.g. an RF

SAW filter) may be used in order to improve

the performance in specific applications. The

use of wire-wound inductors in the application

circuit will also improve the RF performance

and give higher output power. For more

information, see DN017 [6].

7.6

Power supply decoupling

The power supply must be properly decoupled

close to the supply pins. Note that decoupling

capacitors are not shown in the application

circuit. The placement and the size of the

decoupling capacitors are very important to

achieve the optimum performance.

The

CC1150EM reference design should be

followed closely ([1] and [2]).

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