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EM357-RTR Datasheet(PDF) 86 Page - List of Unclassifed Manufacturers |
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EM357-RTR Datasheet(HTML) 86 Page - List of Unclassifed Manufacturers |
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86 / 240 page  EM351 / EM357 The GPIO pins that can be assigned to these signals are shown in Table 8-5. Table 8-5. SPI Slave GPIO Usage MOSI MISO SCLK nSSEL Direction Input Output Input Input GPIO Configuration Input Alternate Output (push-pull) Input Input SC1 pin PB2 PB1 PB3 PB4 SC2 pin PA0 PA1 PA2 PA3 8.4.2 Set Up and Configuration Both serial controllers, SC1 and SC2, support SPI slave mode. SPI slave mode is enabled by the following register settings: The serial controller mode register, SCx_MODE, is 2 The SC_SPIMST bit in the SPI configuration register, SCx_SPICFG, is 0 The SPI slave controller receives its clock from an external SPI master device and supports rates up to 5 Mbps. 8-15 120-035X-000D Preliminary |
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