EP1M350 datasheet(13/86 Pages) ALTERA

13 / 86 page

Altera Corporation

Mercury Programmable Logic Device Family Data Sheet

Notes to Figure 4:

(1)

EP1M350 devices have 18 individual receiver and transmitter channels. EP1M120

devices have 8 individual receiver and transmitter channels. Receiver and

transmitter channel numbers in parenthesis are for EP1M350 devices.

(2)

W = 1 to 12, 14, 16, 18, or 20

J = 3 to 12, 14, 16, 18, or 20

W does not have to equal J.

(3)

For every receiver channel in EP1M350 and EP1M120 devices, the ÷J recovered

clock can drive the priority column interconnect for use as a clock.

(4)

The two center channels adjacent to the HSDI PLLs (channels 4 and 5 for EP1M120

devices, channels 9 and 10 for EP1M350 devices) can drive the Mercury device’s

global clocks.

(5)

HSDI_CLK1

and HSDI_CLK2 pins must be differential. These clock pins drive

HSDI PLLs only. They do not drive to the logic array.

The multiplied reference clock is also used to synchronize and serialize at

the transmitter side.

Up to two different serial data rates are supported for input channels or

output channels. Received data must be non-return-to-zero (NRZ).

Table 7 defines the support for CDR-mode applications. Table 8 shows the

supported data rates for each speed grade.

Notes to Table 7:

(1)

The VCM operating range for AC-coupled applications is from 0 to 0.7 V and from 1.8 to 2.4 V.

(2)

Use AC-coupled LVDS or another I/O standard. The DC-coupled LVDS I/O standard provides performance up to

1.0 Gbps.

f For more information on CDR, see AN 130: CDR in Mercury Devices.

Table 7. CDR-Mode Applications

Data Rate

CDR Mode

DC-Coupled

LVDS

DC-Coupled

LVPECL

DC-Coupled

3.3-V PCML

AC-Coupled

LVDS (1)

AC-Coupled

LVPECL (1)

AC-Coupled

3.3-V PCML

(1)

1.0 to 1.25 Gbps

(2)

vvv

≤ 1.0 Gbps

vvv

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