HD6432138SW datasheet(431/1061 Pages) RENESAS

431 / 1061 page

Section 14 Watchdog Timer (WDT)

Rev. 4.00 Jun 06, 2006 page 377 of 1004

REJ09B0301-0400

Bit 7—Overflow Flag (OVF): A status flag that indicates that TCNT has overflowed from H'FF

to H'00.

Bit 7

OVF

Description

[Clearing conditions]

(Initial value)

• Write 0 in the TME bit

• Read TCSR when OVF = 1*, then write 0 in OVFA

[Setting condition]

When TCNT overflows (changes from H'FF to H'00)

(When internal reset request generation is selected in watchdog timer mode, OVF is

cleared automatically by the internal reset.)

Note:

When OVF flag is polled and the interval timer interrupt is disabled, OVF=1 must be

read at least twice.

Bit 6—Timer Mode Select (WT/

IT): Selects whether the WDT is used as a watchdog timer or

interval timer. If used as an interval timer, the WDT generates an interval timer interrupt request

(WOVI) when TCNT overflows. If used as a watchdog timer, the WDT generates a reset or NMI

interrupt when TCNT overflows.

Bit 6

WT/

Description

Interval timer: Sends the CPU an interval timer interrupt request (WOVI) when TCNT

overflows

(Initial value)

Watchdog timer: Generates a reset or NMI interrupt when TCNT overflows

Bit 5—Timer Enable (TME): Selects whether TCNT runs or is halted.

Bit 5

TME

Description

TCNT is initialized to H'00 and halted

(Initial value)

TCNT counts

TCSR0 Bit 4—Reset Select (RSTS): Reserved. This bit should not be set to 1.

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