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HD6432138SW Datasheet(PDF) 428 Page - Renesas Technology Corp |
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HD6432138SW Datasheet(HTML) 428 Page - Renesas Technology Corp |
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428 / 1061 page ![]() Section 14 Watchdog Timer (WDT) Rev. 4.00 Jun 06, 2006 page 374 of 1004 REJ09B0301-0400 14.1.3 Pin Configuration Table 14.1 describes the WDT input pin. Table 14.1 WDT Pin Name Symbol I/O Function External subclock input pin EXCL Input WDT1 prescaler counter input clock 14.1.4 Register Configuration The WDT has four registers, as summarized in table 14.2. These registers control clock selection, WDT mode switching, the reset signal, etc. Table 14.2 WDT Registers Address* 1 Channel Name Abbreviation R/W Initial Value Write* 2 Read 0 Timer control/status register 0 TCSR0 R/(W)* 3 H'00 H'FFA8 H'FFA8 Timer counter 0 TCNT0 R/W H'00 H'FFA8 H'FFA9 1 Timer control/status register 1 TCSR1 R/(W)* 3 H'00 H'FFEA H'FFEA Timer counter 1 TCNT1 R/W H'00 H'FFEA H'FFEB Common System control register SYSCR R/W H'09 H'FFC4 H'FFC4 Notes: 1. Lower 16 bits of the address. 2. For details of write operations, see section 14.2.4, Notes on Register Access. 3. Only 0 can be written in bit 7, to clear the flag. |
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