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HD6432138SW Datasheet(PDF) 334 Page - Renesas Technology Corp |
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HD6432138SW Datasheet(HTML) 334 Page - Renesas Technology Corp |
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334 / 1061 page ![]() Section 11 16-Bit Free-Running Timer Rev. 4.00 Jun 06, 2006 page 280 of 1004 REJ09B0301-0400 Bit 5 ICFC Description 0 [Clearing condition] Read ICFC when ICFC = 1, then write 0 in ICFC (Initial value) 1 [Setting condition] When an input capture signal is received Bit 4—Input Capture Flag D (ICFD): This status flag indicates that the FRC value has been transferred to ICRD by means of an input capture signal. When BUFEB = 1, on occurrence of the signal transition in FTID (input capture signal) specified by the IEDGD bit, ICFD is set but data is not transferred to ICRD. Therefore, in buffer operation, ICFD can be used as an external interrupt by setting the ICIDE bit to 1. ICFD must be cleared by software. It is set by hardware, however, and cannot be set by software. Bit 4 ICFD Description 0 [Clearing condition] Read ICFD when ICFD = 1, then write 0 in ICFD (Initial value) 1 [Setting condition] When an input capture signal is received Bit 3—Output Compare Flag A (OCFA): This status flag indicates that the FRC value matches the OCRA value. This flag must be cleared by software. It is set by hardware, however, and cannot be set by software. Bit 3 OCFA Description 0 [Clearing condition] Read OCFA when OCFA = 1, then write 0 in OCFA (Initial value) 1 [Setting condition] When FRC = OCRA |
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