HD6432138SW datasheet(331/1061 Pages) RENESAS

331 / 1061 page

Section 11 16-Bit Free-Running Timer

Rev. 4.00 Jun 06, 2006 page 277 of 1004

REJ09B0301-0400

Bit 7—Input Capture Interrupt A Enable (ICIAE): Selects whether to request input capture

interrupt A (ICIA) when input capture flag A (ICFA) in TCSR is set to 1.

Bit 7

ICIAE

Description

Input capture interrupt request A (ICIA) is disabled

(Initial value)

Input capture interrupt request A (ICIA) is enabled

Bit 6—Input Capture Interrupt B Enable (ICIBE): Selects whether to request input capture

interrupt B (ICIB) when input capture flag B (ICFB) in TCSR is set to 1.

Bit 6

ICIBE

Description

Input capture interrupt request B (ICIB) is disabled

(Initial value)

Input capture interrupt request B (ICIB) is enabled

Bit 5—Input Capture Interrupt C Enable (ICICE): Selects whether to request input capture

interrupt C (ICIC) when input capture flag C (ICFC) in TCSR is set to 1.

Bit 5

ICICE

Description

Input capture interrupt request C (ICIC) is disabled

(Initial value)

Input capture interrupt request C (ICIC) is enabled

Bit 4—Input Capture Interrupt D Enable (ICIDE): Selects whether to request input capture

interrupt D (ICID) when input capture flag D (ICFD) in TCSR is set to 1.

Bit 4

ICIDE

Description

Input capture interrupt request D (ICID) is disabled

(Initial value)

Input capture interrupt request D (ICID) is enabled

HD6432138SW Datasheet(PDF) 331 Page - Renesas Technology Corp