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AT45DB041B-RU Datasheet(PDF) 12 Page - ATMEL Corporation |
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AT45DB041B-RU Datasheet(HTML) 12 Page - ATMEL Corporation |
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12 / 35 page  12 3443C–DFLSH–5/05 AT45DB041B 6. Power-on/Reset State When power is first applied to the device, or when recovering from a reset condition, the device will default to SPI Mode 3. In addition, the SO pin will be in a high-impedance state, and a high- to-low transition on the CS pin will be required to start a valid instruction. The SPI mode will be automatically selected on every falling edge of CS by sampling the inactive clock state. After power is applied and V CC is at the minimum datasheet value, the system should wait 20 ms before an operational mode is started. Note: r = Reserved Bit P = Page Address Bit B = Byte/Buffer Address Bit x = Don’t Care Table 6-1. Detailed Bit-level Addressing Sequence Opcode Opcode Address Byte Address Byte Address Byte Additional Don’t Care Bytes Required 50H 0 101 000 0r r r r PPPPP PPP xxx xxxxx xxxx N/A 52H 0 101 001 0r r r r PPPPP PPPPPP BBBBB BBBB 4 Bytes 53H 0 101 001 1r r r r PPPPP PPPPPP xxxxx xxxx N/A 54H 0 1 0 1 0 1 0 0 xxx xxxxxx xxxxxx BBBBB BBBB 1 Byte 55H 0 101 010 1r r r r PPPPP PPPPPP xxxxx xxxx N/A 56H 0 1 0 1 0 1 1 0 xxx xxxxxx xxxxxx BBBBB BBBB 1 Byte 57H 0 101 011 1 N/A N/A N/A N/A 58H 0 101 100 0r r r r PPPPP PPPPPP xxxxx xxxx N/A 59H 0 101 100 1r r r r PPPPP PPPPPP xxxxx xxxx N/A 60H 0 110 000 0r r r r PPPPP PPPPPP xxxxx xxxx N/A 61H 0 110 000 1r r r r PPPPP PPPPPP xxxxx xxxx N/A 68H 0 110 100 0r r r r PPPPP PPPPPP BBBBB BBBB 4 Bytes 81H 1 000 000 1r r r r PPPPP PPPPPP xxxxx xxxx N/A 82H 1 000 001 0r r r r PPPPP PPPPPP BBBBB BBBB N/A 83H 1 000 001 1r r r r PPPPP PPPPPP xxxxx xxxx N/A 84H 1 0 0 0 0 1 0 0 xxx xxxxxx xxxxxx BBBBB BBBB N/A 85H 1 000 010 1r r r r PPPPP PPPPPP BBBBB BBBB N/A 86H 1 000 011 0r r r r PPPPP PPPPPP xxxxx xxxx N/A 87H 1 0 0 0 0 1 1 1 xxx xxxxxx xxxxxx BBBBB BBBB N/A 88H 1 000 100 0r r r r PPPPP PPPPPP xxxxx xxxx N/A 89H 1 000 100 1r r r r PPPPP PPPPPP xxxxx xxxx N/A D2H 1 101 001 0r r r r PPPPP PPPPPP BBBBB BBBB 4 Bytes D4H 1 1 0 1 0 1 0 0 xxx xxxxxx xxxxxx BBBBB BBBB 1 Byte D6H 1 1 0 1 0 1 1 0 xxx xxxxxx xxxxxx BBBBB BBBB 1 Byte D7H 1 101 011 1 N/A N/A N/A N/A E8H 1 110 100 0r r r r PPPPP PPPPPP BBBBB BBBB 4 Bytes |
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