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AT45DB041B-RU Datasheet(PDF) 7 Page - ATMEL Corporation

Part # AT45DB041B-RU
Description  4-megabit 2.5-volt or 2.7-volt DataFlash
PDF  35 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT45DB041B-RU Datasheet(HTML) 7 Page - ATMEL Corporation

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3443C–DFLSH–5/05
AT45DB041B
Successive page programming operations without doing a page erase are not recommended. In
other words, changing bytes within a page from a “1” to a “0” during multiple page programming
operations without erasing that page is not recommended.
5.2.4
Page Erase
The optional Page Erase command can be used to individually erase any page in the main
memory array allowing the Buffer to Main Memory Page Program without Built-in Erase com-
mand to be utilized at a later time. To perform a Page Erase, an opcode of 81H must be loaded
into the device, followed by four reserved bits, 11 address bits (PA10 - PA0), and nine don’t care
bits. The 11 address bits are used to specify which page of the memory array is to be erased.
When a low-to-high transition occurs on the CS pin, the part will erase the selected page to 1s.
The erase operation is internally self-timed and should take place in a maximum time of t
PE. Dur-
ing this time, the status register will indicate that the part is busy.
5.2.5
Block Erase
A block of eight pages can be erased at one time allowing the Buffer to Main Memory Page Pro-
gram without Built-in Erase command to be utilized to reduce programming times when writing
large amounts of data to the device. To perform a Block Erase, an opcode of 50H must be
loaded into the device, followed by four reserved bits, eight address bits (PA10 - PA3), and 12
don’t care bits. The eight address bits are used to specify which block of eight pages is to be
erased. When a low-to-high transition occurs on the CS pin, the part will erase the selected
block of eight pages to 1s. The erase operation is internally self-timed and should take place in a
maximum time of t
BE. During this time, the status register will indicate that the part is busy.
Table 5-2.
Block Erase Addressing
PA10
PA9
PA8
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
Block
0
000
0000
X
X
X
0
0
000
0001
X
X
X
1
0
000
0010
X
X
X
2
0
000
0011
X
X
X
3
1
111
1100
X
X
X
252
1
111
1101
X
X
X
253
1
111
1110
X
X
X
254
1
111
1111
X
X
X
255



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