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SARA-R5 Datasheet(PDF) 29 Page - u-blox AG |
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SARA-R5 Datasheet(HTML) 29 Page - u-blox AG |
29 / 43 page ![]() SARA-R5 series - Data sheet UBX-19016638 - R06 Electrical specifications Page 29 of 43 C1-Public SARA-R5 series modules LTE receiver characteristics are compliant to 3GPP TS 36.521-1 [7], with LTE conducted receiver sensitivity performance described in Table 15. Parameter Min. Typical Max. Unit Remarks Receiver input sensitivity Band 12 (700 MHz) –110.5 dBm Without repetitions Receiver input sensitivity Band 28 (700 MHz) –110.5 dBm Without repetitions Receiver input sensitivity Band 13 (750 MHz) –110.5 dBm Without repetitions Receiver input sensitivity Band 20 (800 MHz) –110.5 dBm Without repetitions Receiver input sensitivity Band 26 (850 MHz) –110.0 dBm Without repetitions Receiver input sensitivity Band 18 (850 MHz) –110.0 dBm Without repetitions Receiver input sensitivity Band 5 (850 MHz) –110.0 dBm Without repetitions Receiver input sensitivity Band 19 (850 MHz) –110.0 dBm Without repetitions Receiver input sensitivity Band 8 (900 MHz) –109.5 dBm Without repetitions Receiver input sensitivity Band 4 (1700 MHz) –109.0 dBm Without repetitions Receiver input sensitivity Band 3 (1800 MHz) –109.0 dBm Without repetitions Receiver input sensitivity Band 2 (1900 MHz) –109.0 dBm Without repetitions Receiver input sensitivity Band 25 (1900 MHz) –109.0 dBm Without repetitions Receiver input sensitivity Band 1 (2100 MHz) –109.0 dBm Without repetitions Condition: 50 source, throughput > 95%, QPSK modulation, other settings as per clause 7.3EA of 3GPP TS 36.521-1 [7] Table 15: LTE Cat M1 receiver sensitivity performance 4.2.6 PWR_ON pin Parameter Min. Typical Max. Unit Remarks Low-level input -0.3 0.3 V Pull-up resistance 10 k Integrated pull-up to internal rail Low-level input current -300 µ A PWR_ON low time 1 2 s Low time to trigger module switch on from power-off mode 1 2 s Low time to trigger module wake-up from PSM deep-sleep 1.5 2.5 s Low time to trigger module normal graceful switch off 20 s Low time to trigger module abrupt emergency hardware reset Table 16: PWR_ON pin characteristics |
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