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TUSB8043 Datasheet(PDF) 7 Page - Texas Instruments |
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TUSB8043 Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 59 page  7 TUSB8043 www.ti.com SLLSEW4 – JUNE 2017 Product Folder Links: TUSB8043 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Pin Functions (continued) PIN I/O DESCRIPTION NAME NO. OVERCUR4z 43 I, PU USB Port 4 Over-Current Detection. This pin is typically connected to the over current output of the downstream port power switch for Port 4. 0 = An over current event has occurred 1 = An over current event has not occurred When GANGED power management is enabled, this pin or one of the other OVERCURz pins must be connected to the over current output of the power switch or circuit which detects the over current conditions. For the case when another OVERCURz pin is used, this pin can be left unconnected. I2C/SMBUS I2C Signals SCL/SMBCLK 38 I/O, PD I2C clock/SMBus clock. Function of pin depends on the setting of the SMBUSz input. When SMBUSz = 1, this pin acts as the serial clock interface for an I2C EEPROM. When SMBUSz = 0, this pin acts as the serial clock interface for an SMBus host. Can be left unconnected if external interface not implemented. SDA/SMBDAT 37 I/O, PD I2C data/SMBus data. Function of pin depends on the setting of the SMBUSz input. When SMBUSz = 1, this pin acts as the serial data interface for an I2C EEPROM. When SMBUSz = 0, this pin acts as the serial data interface for an SMBus host. Can be left unconnected if external interface not implemented. SMBUSz/SS_SUSPEND 39 I/O, PU I2C/SMBus mode select/SuperSpeed USB Suspend Status. The value of the pin is sampled at the de-assertion of reset set I2C or SMBus mode as follows: 1 = I2C Mode Selected 0 = SMBus Mode Selected Can be left unconnected if external interface not implemented. After reset, this signal indicates the SuperSpeed USB Suspend status of the upstream port if enabled through the stsOutputEn bit in the Additional Feature Configuration register. When enabled, a value of 1 indicates the connection is suspended. Test and Miscellaneous Signals FULLPWRMGMTz / FULLAUTOz / SMBA1/SS_UP / CLKOUT_ENz 40 I/O, PD Full power management enable/SMBus address bit 1/SuperSpeed USB Connection Status Upstream port. The value of the pin is sampled at the de-assertion of reset to set the power switch control follows: 0 = Power switching and over current inputs supported 1 = Power switching and over current inputs not supported Full power management is the ability to control power to the downstream ports of the TUSB8043 using PWRCTL[4:1]/BATEN[4:1]. If BATENx = 1 on any port, full power management must be enabled so the value of the terminal is sampled at the de-assertion to initialize the value of the FULLAUTOz bit. When AUTOENz = 0 and FULLAUTOz = 0: all ACP modes are supported. When AUTOENz = 0 and FULLAUTOz = 1:only highest current ACP mode is used in auto mode. When SMBus mode is enabled, this pin sets the value of the SMBus slave address bit 1. Can be left unconnected if full power management and SMBus are not implemented. After reset, this signal indicates the SuperSpeed USB connection status of the upstream port if enabled through the stsOutputEn bit in the Additional Feature Configuration register. When enabled a value of 1 indicates the upstream port is connected to a SuperSpeed USB capable port. Note: Power switching must be supported for battery charging applications. PWRCTL_POL 41 I/O, PU Power Control Polarity. The value of the pin is sampled at the de-assertion of reset to set the polarity of PWRCTL[4:1]. 0 = PWRCTL polarity is active low 1 = PWRCTL polarity is active high |
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