PCINT8 datasheet(25/294 Pages) ATMEL

25 / 294 page

9219A–RFID–01/11

Atmel ATA5505 [Preliminary]

Keep the Atmel® AVR® RESET active (low) during periods of insufficient power supply volt-

age. This can be done by enabling the internal Brown-out Detector (BOD). If the detection

level of the internal BOD does not match the needed detection level, an external low V

CC reset

protection circuit can be used. If a reset occurs while a write operation is in progress, the write

operation will be completed provided that the power supply voltage is sufficient.

3.4

I/O Memory

The I/O space definition of the Atmel AVR is shown in Section 26. “Register Summary” on

page 282.

All Atmel AVR I/Os and peripherals are placed in the I/O space. All I/O locations may be

accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32

general purpose working registers and the I/O space. I/O Registers within the address range

0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers,

the value of single bits can be checked by using the SBIS and SBIC instructions. Refer to the

instruction set section for more details. When using the I/O specific commands IN and OUT,

the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space

using LD and ST instructions, 0x20 must be added to these addresses. The Atmel AVR is a

complex microcontroller with more peripheral units than can be supported within the 64 loca-

tion reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from

0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.

For compatibility with future devices, reserved bits should be written to zero if accessed.

Reserved I/O memory addresses should never be written.

Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most

other Atmel AVRs, the CBI and SBI instructions will only operate on the specified bit, and can

therefore be used on registers containing such Status Flags. The CBI and SBI instructions

work with registers 0x00 to 0x1F only.

The I/O and Peripherals Control Registers are explained in later sections.

3.4.1

General Purpose I/O Registers

The Atmel AVR contains three General Purpose I/O Registers. These registers can be used

for storing any information, and they are particularly useful for storing global variables and Sta-

tus Flags.

The General Purpose I/O Registers within the address range 0x00 - 0x1F are directly

bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.

3.5

3.5.1

EEARH and EEARL – EEPROM Address Register

Bit

543210

-----

EEAR8

EEARH

EEAR7

EEAR6

EEAR5

EEAR4

EEAR3

EEAR2

EEAR1

EEAR0

EEARL

Bit

543210

Read/Write

RRRRRRR

R/W

Read/Write

R/W

Initial Value

00000

Initial Value

XXXXX

XXX

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