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AFE5808ZCF Datasheet(PDF) 9 Page - Texas Instruments |
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AFE5808ZCF Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 68 page  AFE5808 www.ti.com SLOS688C – SEPTEMBER 2010 – REVISED APRIL 2012 ELECTRICAL CHARACTERISTICS (continued) AVDD_5V = 5V, AVDD = 3.3V, AVDD_ADC = 1.8V, DVDD = 1.8V, AC-coupled with 0.1µF at INP and bypassed to ground with 15nF at INM, No active termination, VCNTL= 0V, fIN= 5MHz, LNA = 18dB, PGA = 24dB, 14Bit, sample rate = 65MSPS, LPF Filter = 15MHz, low noise mode, VOUT = –1dBFS, internal 500Ω CW feedback resistor, CMOS CW clocks, ADC configured in internal reference mode, Single-ended VCNTL mode, VCNTLM = GND, at ambient temperature TA = 25°C, unless otherwise noted. Min and max values are specified across full-temperature range with AVDD_5V = 5V, AVDD = 3.3V, AVDD_ADC = 1.8V, DVDD = 1.8V PARAMETER TEST CONDITION MIN TYP MAX UNITS ADC input full-scale range 2 Vpp LVDS Rate 65MSPS at 14 bit 910 Mbps POWER DISSIPATION AVDD Voltage 3.15 3.3 3.6 V AVDD_ADC Voltage 1.7 1.8 1.9 V AVDD_5V Voltage 4.75 5 5.5 V DVDD Voltage 1.7 1.8 1.9 V TGC low noise mode, 65MSPS 153 175 TGC low noise mode, 40MSPS 142 Total power dissipation per channel mW/CH TGC medium power mode, 40MSPS 110 TGC low power mode, 40MSPS 98 TGC low noise mode, no signal 203 235 TGC medium power mode, no signal 126 TGC low power mode, no signal 99 CW-mode, no signal 147 170 AVDD (3.3V) Current mA TGC low noise mode, 500mVpp Input,1% duty cycle 210 TGC medium power mode, 500mVpp Input, 1% duty cycle 133 TGC low power, 500mVpp Input, 1% duty cycle 105 CW-mode, 500mVpp Input 375 TGC mode no signal 16.5 22 CW Mode no signal, 16X clock = 32MHz 32 AVDD_5V Current mA TGC mode, 500mVpp Input,1% duty cycle 16.5 CW-mode, 500mVpp Input 42.5 TGC low noise mode, no signal 93.5 107 TGC medium power mode, no signal 62 TGC low power mode, no signal 50 VCA Power dissipation mW/CH TGC low noise mode, 500mVpp input,1% duty cycle 97 TGC medium power mode, 500mVpp Input, 1% duty cycle 65 TGC low power mode, 500mVpp input,1% duty cycle 54 CW Power dissipation No signal, ADC shutdown CW Mode no signal, 16X clock = 32MHz 80 mW/CH 500mVpp input, ADC shutdown , 16X clock = 32MHz 173 AVDD_ADC(1.8V) Current 65MSPS 187 205 mA DVDD(1.8V) Current 65MSPS 77 110 mA ADC Power dissipation/CH 65MSPS 59 69 mW/CH 50MSPS 51 40MSPS 46 20MSPS 35 Power dissipation in power down mode PDN_VCA = High, PDN_ADC = High 25 mW/CH Complete power-down PDN_Globa l= High 0.6 Power-down response time Time taken to enter power down 1 µs Power-up response time VCA power down 2µs+1% of PDN time µs ADC power down 1 Complete power down 2.5 ms fin = 5MHz, at 50mVpp noise at 1KHz on supply (3) –65 dBc Power supply modulation ratio, AVDD and AVDD_5V fin = 5MHz, at 50mVpp noise at 50KHz on supply (3) –65 dBc Power supply rejection ratio f = 10kHz,VCNTL = 0V (high gain), AVDD –40 dBc f = 10kHz,VCNTL = 0V (high gain), AVDD_5V –55 dBc f = 10kHz,VCNTL = 1V (low gain), AVDD –50 dBc (3) PSMR specification is with respect to input signal amplitude. Copyright © 2010–2012, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): AFE5808 |
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