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AFE5808ZCF Datasheet(PDF) 44 Page - Texas Instruments |
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AFE5808ZCF Datasheet(HTML) 44 Page - Texas Instruments |
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44 / 68 page ![]() I/Q CLK Generator 4X/8X Clock D Q INV 1X Clock LNA1 Weight Weight Weight Weight LNA2~8 In-phase CLK Quadrature CLK I/V I/V Summed In-Phase Summed Quadrature Fin 1X Clock 1X Clock Phase 0° Fin 4X Clock 1X Clock Phase 90° Quadrature clocks 1 T 16 LNA1 Weight Weight Weight Weight LNA2~8 In-phase CLK Quadrature CLK I/V I/V Summed In-Phase Summed Quadrature Syncronized I/Q CLOCKs AFE5808 SLOS688C – SEPTEMBER 2010 – REVISED APRIL 2012 www.ti.com Figure 73. 8 X ƒcw and 4 X ƒcw Block Diagram Figure 74. 8 x ƒcw and 4 x ƒcw Timing Diagram 1 × ƒcw Mode The 1x ƒcw mode requires in-phase and quadrature clocks with low phase noise specifications. The phase delay resolution is also achieved by weighting the in-phase and quadrature signals as described in the 8 × ƒcw and 4 × ƒcw modes. Figure 75. Block Diagram of 1 x ƒcw mode 44 Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): AFE5808 |
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