AFE5808ZCF datasheet(8/68 Pages) TI1

8 / 68 page

AFE5808

SLOS688C – SEPTEMBER 2010 – REVISED APRIL 2012

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ELECTRICAL CHARACTERISTICS (continued)

AVDD_5V = 5V, AVDD = 3.3V, AVDD_ADC = 1.8V, DVDD = 1.8V, AC-coupled with 0.1µF at INP and bypassed to ground

with 15nF at INM, No active termination, VCNTL= 0V, fIN= 5MHz, LNA = 18dB, PGA = 24dB, 14Bit, sample rate = 65MSPS,

LPF Filter = 15MHz, low noise mode, VOUT = –1dBFS, internal 500Ω CW feedback resistor, CMOS CW clocks, ADC

configured in internal reference mode, Single-ended VCNTL mode, VCNTLM = GND, at ambient temperature TA = 25°C,

unless otherwise noted. Min and max values are specified across full-temperature range with AVDD_5V = 5V, AVDD = 3.3V,

AVDD_ADC = 1.8V, DVDD = 1.8V

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNITS

CW DOPPLER

1 channel mixer, LNA = 24dB, 500

Ω feedback resistor

0.8

en (RTI)

Input voltage noise (CW)

nV/rtHz

8 channel mixer, LNA = 24dB, 62.5

Ω feedback resistor

0.33

1 channel mixer, LNA = 24dB, 500

Ω feedback resistor

en (RTO)

Output voltage noise (CW)

nV/rtHz

8 channel mixer, LNA = 24dB, 62.5

Ω feedback resistor

1 channel mixer, LNA = 18dB, 500

Ω feedback resistor

1.1

en (RTI)

Input voltage noise (CW)

nV/rtHz

8 channel mixer, LNA = 18dB, 62.5

Ω feedback resistor

0.5

1 channel mixer, LNA = 18dB, 500

Ω feedback resistor

8.1

en (RTO)

Output voltage noise (CW)

nV/rtHz

8 channel mixer, LNA = 18dB, 62.5

Ω feedback resistor

4.0

Rs = 100

Ω,RIN = High Z, fin = 2MHz (LNA, I/Q mixer and summing

Noise figure

1.8

amplifier/filter)

fCW

CW Operation Range

(2)

CW signal carrier frequency

MHz

1X CLK (16X mode)

CW Clock frequency

16X CLK(16X mode)

128

MHz

4X CLK(4X mode)

AC coupled LVDS clock amplitude

0.7

CLKM_16X-CLKP_16X; CLKM_1X-CLKP_1X

Vpp

AC coupled LVPECL clock amplitude

1.6

CLK duty cycle

1X and 16X CLKs

35%

65%

Common-mode voltage

Internal provided

2.5

VCMOS

CMOS Input clock amplitude

CW Mixer conversion loss

CW Mixer phase noise

1kHz off 2MHz carrier

156

dBc/Hz

Input dynamic range

FIN = 2MHz, LNA = 24/18/12dB

160/164/165

dBFS/Hz

f1 = 5 MHz, f2 = 5.01 MHz, both tones at -8.5dBm amplitude, 8 channels

–50

dBc

summed up in-phase, CW feedback resistor = 87

IMD3

Intermodulation distortion

f1 = 5 MHz, f2= 5.01 MHz, both tones at –8.5dBm amplitude, Single

–60

dBc

channel case, CW feed back resistor = 500

I/Q Channel gain matching

16X mode

±0.04

I/Q Channel phase matching

16X mode

±0.1

Degree

I/Q Channel gain matching

4X mode

±0.04

I/Q Channel phase matching

4X mode

±0.1

Degree

Image rejection ratio

fin = 2.01MHz, 300mV input amplitude, CW clock frequency = 2.00MHz

–50

dBc

CW SUMMING AMPLIFIER

VCMO

Common-mode voltage

Summing amplifier inputs/outputs

1.5

Summing amplifier output

Vpp

100Hz

nV/rtHz

Input referred voltage noise

1kHz

1.2

nV/rtHz

2KHz-100MHz

nV/rtHz

Input referred current noise

2.5

pA/rtHz

Unit gain bandwidth

200

MHz

Max output current

Linear operation range

mApp

ADC SPECIFICATIONS

Sample rate

MSPS

SNR

Signal-to-noise ratio

Idle channel SNR of ADC 14b

dBFS

REFP

1.5

Internal reference mode

REFM

0.5

VREF_IN Voltage

1.4

External reference mode

VREF_IN Current

µA

(2)

In the 16X operation mode, the CW operation range is limited to 8MHz due to the 16X CLK. The maximum clock frequency for the 16X

CLK is 128MHz. In the 8X, 4X, and 1X modes, higher CW signal frequencies up to 15 MHz can be supported with small degradation in

performance, see application information: CW clock selection. .

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