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AFE5808ZCF Datasheet(PDF) 63 Page - Texas Instruments |
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AFE5808ZCF Datasheet(HTML) 63 Page - Texas Instruments |
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63 / 68 page ![]() AFE5808 www.ti.com SLOS688C – SEPTEMBER 2010 – REVISED APRIL 2012 High-speed mixed signal devices are sensitive to various types of noise coupling. One primary source of noise is the switching noise from the serializer and the output buffer/drivers. For the AFE5808, care has been taken to ensure that the interaction between the analog and digital supplies within the device is kept to a minimal amount. The extent of noise coupled and transmitted from the digital and analog sections depends on the effective inductances of each of the supply and ground connections. Smaller effective inductance of the supply and ground pins leads to improved noise suppression. For this reason, multiple pins are used to connect each supply and ground sets. It is important to maintain low inductance properties throughout the design of the PCB layout by use of proper planes and layer thickness. BOARD LAYOUT Proper grounding and bypassing, short lead length, and the use of ground and power-supply planes are particularly important for high-frequency designs. Achieving optimum performance with a high-performance device such as the AFE5808 requires careful attention to the PCB layout to minimize the effects of board parasitics and optimize component placement. A multilayer PCB usually ensures best results and allows convenient component placement. In order to maintain proper LVDS timing, all LVDS traces should follow a controlled impedance design. In addition, all LVDS trace lengths should be equal and symmetrical; it is recommended to keep trace length variations less than 150mil (0.150 in or 3.81mm). In addition, appropriate delay matching should be considered for the CW clock path, especially in systems with high channel count. For example, if clock delay is half of the 16x clock period, a phase error of 22.5°C could exist. Thus the timing delay difference among channels contributes to the beamformer accuracy. Additional details on BGA PCB layout techniques can be found in the Texas Instruments Application Report MicroStar BGA Packaging Reference Guide (SSYZ015B), which can be downloaded from www.ti.com. Copyright © 2010–2012, Texas Instruments Incorporated Submit Documentation Feedback 63 Product Folder Link(s): AFE5808 |
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