HD6432138SW datasheet(313/1061 Pages) RENESAS

313 / 1061 page

Section 10 14-Bit PWM D/A

Rev. 4.00 Jun 06, 2006 page 259 of 1004

REJ09B0301-0400

10.2.3

PWM D/A Control Register (DACR)

TEST

R/W

PWME

R/W

—

OEB

R/W

CKS

R/W

OEA

R/W

Bit

Initial value

Read/Write

DACR is an 8-bit readable/writable register that selects test mode, enables the PWM outputs, and

selects the output phase and operating speed.

DACR is initialized to H'30 by a reset, and in the standby modes, watch mode, subactive mode,

subsleep mode, and module stop mode.

Bit 7—Test Mode (TEST): Selects test mode, which is used in testing the chip. Normally this bit

should be cleared to 0.

Bit 7

TEST

Description

PWM (D/A) in user state: normal operation

(Initial value)

PWM (D/A) in test state: correct conversion results unobtainable

Bit 6—PWM Enable (PWME): Starts or stops the PWM D/A counter (DACNT).

Bit 6

PWME

Description

DACNT operates as a 14-bit up-counter

(Initial value)

DACNT halts at H'0003

Bits 5 and 4—Reserved: These bits cannot be modified and are always read as 1.

Bit 3—Output Enable B (OEB): Enables or disables output on PWM D/A channel B.

Bit 3

OEB

Description

PWM (D/A) channel B output (at the PWX1 pin) is disabled

(Initial value)

PWM (D/A) channel B output (at the PWX1 pin) is enabled

HD6432138SW Datasheet(PDF) 313 Page - Renesas Technology Corp

HD6432138SW Datasheet(HTML) 313 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL