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HD6432138SW Datasheet(PDF) 165 Page - Renesas Technology Corp

Part # HD6432138SW
Description  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1061 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6432138SW Datasheet(HTML) 165 Page - Renesas Technology Corp

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Section 5 Interrupt Controller
Rev. 4.00 Jun 06, 2006 page 111 of 1004
REJ09B0301-0400
5.2.7
Address Break Control Register (ABRKCR)
7
CMF
0
R
6
—
0
—
5
—
0
—
4
—
0
—
3
—
0
—
0
BIE
0
R/W
2
—
0
—
1
—
0
—
Bit
Initial value
Read/Write
ABRKCR is an 8-bit readable/writable register that performs address break control.
ABRKCR is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7—Condition Match Flag (CMF): This is the address break source flag, used to indicate that
the address set by BAR has been prefetched. When the CMF flag and BIE flag are both set to 1, an
address break is requested.
Bit 7
CMF
Description
0
[Clearing condition]
When address break interrupt exception handling is executed
(Initial value)
1
[Setting condition]
When address set by BARA to BARC is prefetched while BIE = 1
Bits 6 to 1—Reserved: These bits cannot be modified and are always read as 0.
Bit 0—Break Interrupt Enable (BIE): Selects address break enabling or disabling.
Bit 0
BIE
Description
0
Address break disabled
(Initial value)
1
Address break enabled



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