HD6432138SW datasheet(628/1061 Pages) RENESAS

Part #	HD6432138SW

Description	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

PDF	1061 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 20 RAM

Rev. 4.00 Jun 06, 2006 page 574 of 1004

REJ09B0301-0400

20.1.2

The on-chip RAM is controlled by SYSCR. Table 20.1 shows the register configuration.

Table 20.1

Name

Abbreviation

R/W

Initial Value

Address*

System control register

SYSCR

R/W

H'09

H'FFC4

Note:

Lower 16 bits of the address.

20.2

System Control Register (SYSCR)

CS2E

R/W

IOSE

R/W

INTM1

INTM0

R/W

XRST

RAME

R/W

NMIEG

R/W

HIE

R/W

Bit

Initial value

Read/Write

The on-chip RAM is enabled or disabled by the RAME bit in SYSCR. For details of other bits in

SYSCR, see section 3.2.2, System Control Register (SYSCR).

Bit 0—RAM Enable (RAME): Enables or disables the on-chip RAM. The RAME bit is

initialized when the reset state is released. It is not initialized in software standby mode.

Bit 0

RAME

Description

On-chip RAM is disabled

On-chip RAM is enabled

(Initial value)

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