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HD6432138SW Datasheet(PDF) 627 Page - Renesas Technology Corp |
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HD6432138SW Datasheet(HTML) 627 Page - Renesas Technology Corp |
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627 / 1061 page  Section 20 RAM Rev. 4.00 Jun 06, 2006 page 573 of 1004 REJ09B0301-0400 Section 20 RAM 20.1 Overview The H8S/2138, H8S/2134, and H8S/2133 have 4 kbytes of on-chip high-speed static RAM, and the H8S/2137, H8S/2132, and H8S/2130 have 2 kbytes. The on-chip RAM is connected to the CPU by a 16-bit data bus, enabling both byte data and word data to be accessed in one state. This makes it possible to perform fast word data transfer. The on-chip RAM can be enabled or disabled by means of the RAM enable bit (RAME) in the system control register (SYSCR). 20.1.1 Block Diagram Figure 20.1 shows a block diagram of the on-chip RAM. Internal data bus (upper 8 bits) Internal data bus (lower 8 bits) H'FFE080 H'FFE082 H'FFE084 H'FFEFFE H'FFE081 H'FFE083 H'FFE085 H'FFEFFF H'FFFF00 H'FFFF7E H'FFFF01 H'FFFF7F Figure 20.1 Block Diagram of RAM (H8S/2138, H8S/2134, H8S/2133) |
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