HD6432138SW datasheet(632/1061 Pages) RENESAS

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Section 21 ROM (Mask ROM Version, H8S/2138 F-ZTAT, H8S/2134 F-ZTAT, and H8S/2132 F-ZTAT)

Rev. 4.00 Jun 06, 2006 page 578 of 1004

REJ09B0301-0400

21.1.2

The H8S/2138 Group and H8S/2134 Group on-chip ROM is controlled by the operating mode and

Table 21.1

ROM Register

Abbreviation

R/W

Initial Value

Address*

Mode control register

MDCR

R/W

Undefined

Depends on the operating mode

H'FFC5

Note:

Lower 16 bits of the address.

21.2

21.2.1

Mode Control Register (MDCR)

Bit

Initial value

Read/Write

EXPE

—*

R/W*

—

MDS0

—*

—

MDS1

—*

Note: * Determined by the MD1 and MD0 pins.

MDCR is an 8-bit register used to set the H8S/2138 Group or H8S/2134 Group operating mode

and monitor the current operating mode.

The EXPE bit is initialized in accordance with the mode pin states by a reset and in hardware

standby mode.

Bit 7—Expanded Mode Enable (EXPE): Sets expanded mode. In mode 1, EXPE is fixed at 1

and cannot be modified. In modes 2 and 3, EXPE has an initial value of 0 and can be read or

written.

Bit 7

EXPE

Description

Single-chip mode selected

Expanded mode selected

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