HD6432138SW datasheet(559/1061 Pages) RENESAS

559 / 1061 page

Section 16 I

2C Bus Interface [H8S/2138 Group Option]

Rev. 4.00 Jun 06, 2006 page 505 of 1004

REJ09B0301-0400

16.3.11

Initialization of Internal State

The IIC has a function for forcible initialization of its internal state if a deadlock occurs during

communication.

Initialization is executed in accordance with the setting of bits CLR3 to CLR0 in the DDCSWR

Switch Register (DDCSWR).

Scope of Initialization: The initialization executed by this function covers the following items:

• TDRE and RDRF internal flags

• Transmit/receive sequencer and internal operating clock counter

• Internal latches for retaining the output state of the SCL and SDA pins (wait, clock, data

output, etc.)

The following items are not initialized:

• Actual register values (ICDR, SAR, SARX, ICMR, ICCR, ICSR, DDCSWR, STCR)

• Internal latches used to retain register read information for setting/clearing flags in the ICMR,

ICCR, ICSR, and DDCSWR registers

• The value of the ICMR register bit counter (BC2 to BC0)

• Generated interrupt sources (interrupt sources transferred to the interrupt controller)

Notes on Initialization:

• Interrupt flags and interrupt sources are not cleared, and so flag clearing measures must be

taken as necessary.

• Basically, other register flags are not cleared either, and so flag clearing measures must be

taken as necessary.

• When initialization is executed by DDCSWR register, the write data for bits CLR3 to CLR0 is

not retained. To perform IIC clearance, bits CLR3 to CLR0 must be written to simultaneously

using an MOV instruction. Do not use a bit manipulation instruction such as BCLR. Similarly,

when clearing is required again, all the bits must be written to simultaneously in accordance

with the setting.

• If a flag clearing setting is made during transmission/reception, the IIC module will stop

transmitting/receiving at that point and the SCL and SDA pins will be released. When

transmission/reception is started again, register initialization, etc., must be carried out as

necessary to enable correct communication as a system.

HD6432138SW Datasheet(PDF) 559 Page - Renesas Technology Corp