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HD6432138SW Datasheet(PDF) 539 Page - Renesas Technology Corp

Part # HD6432138SW
Description  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1061 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6432138SW Datasheet(HTML) 539 Page - Renesas Technology Corp

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Section 16 I
2C Bus Interface [H8S/2138 Group Option]
Rev. 4.00 Jun 06, 2006 page 485 of 1004
REJ09B0301-0400
16.3
Operation
16.3.1
I
2C Bus Data Format
The I
2C bus interface has serial and I2C bus formats.
The I
2C bus formats are addressing formats with an acknowledge bit. These are shown in (a) and
(b) in figure 16.3. The first frame following a start condition always consists of 8 bits.
IIC channel 0 only is capable of formatless operation, as shown in figure 16.4.
The serial format is a non-addressing format with no acknowledge bit. This is shown in figure
16.5.
Figure 16.6 shows the I
2C bus timing.
The symbols used in figures 16.3 to 16.6 are explained in table 16.4.
S
SLA
R/
W
A
DATA
A
A/
A
P
11
1
1
n
7
1
m
(a) I2C bus format (FS = 0 or FSX = 0)
(b) I2C bus format (start condition retransmission, FS = 0 or FSX = 0)
transfer bit count
(n = 1 to 8)
transfer frame count
(m
≥ 1)
S
SLA
R/
W
A
DATA
11
1
n1
7
1
m1
S
SLA
R/
W
A
DATA
A/
A
P
11
1
n2
7
1
m2
11
1
A/
A
transfer bit count (n1 and n2 = 1 to 8)
transfer frame count (m1 and m2
≥ 1)
11
Figure 16.3 I
2C Bus Data Formats (I2C Bus Formats)



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