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FRDM665CANFDEVB Datasheet(PDF) 8 Page - NXP Semiconductors |
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FRDM665CANFDEVB Datasheet(HTML) 8 Page - NXP Semiconductors |
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8 / 13 page ![]() NXP Semiconductors UM11733 Hardware user manual for FRDM665CANFDEVB Pin number Connection Description 1 GPIO0 interface to GPIO0 or INT0 for MC33665A 2 GPIO1 interface to GPIO1 or INT1 for MC33665A 3 GPIO2 interface to GPIO2 or INT2 for MC33665A 4 GPIO3 interface to GPIO3 or INT3 for MC33665A 5 GPIO4 interface to GPIO4 or I2C-bus in MC33665A 6 GPIO5 interface to GPIO5 or I2C-bus in MC33665A 7 GPIO6 interface to GPIO6 or SYNC in MC33665A 8 GPIO7 interface to GPIO7 or HOLD in MC33665A 9 VSS/GND ground 10 VDD5V 5 V supply line 11 VSS/GND ground 12 VIO VIO interface for MC33665A 13 - not connected 14 - not connected 15 NC-CAN_TXD populate R6 to connect CAN_TXD 16 NC-CAN_RXD populate R7 to connect CAN_RXD 17 STB_N_OUT inverted standby signal from MC33665A 18 STB_OUT standby signal from MC33665A 19 RESET reset signal for MC33665A 20 VDD5V 5 V supply line Table 4. GPIO and interface - J1 Pin number Connection Description 1 EXT5V external 5 V supply 2 VSS/GND ground Table 5. External 5 V - J11 Pin number Connection Description 1-2 VREG-VDD5V Connection from VREG generated by internal low dropout (LDO) connection to VDD5V for MC33665A and interface circuits. Note: Default connection. 2-3 EXT5V-VDD5V External 5 V supply can be connected to VDD5V to MC33665A and interface circuits. Table 6. VDD5V jumper - J8 Pin number Connection Description 1-2 VREG-VIO connect VREG (5 V) generated by internal LDO of MC33665A to VDDIO/VIO of MC33665A and interface circuit. Note: Default connection. Table 7. VIO jumper - J13 UM11733 All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved. User manual Rev. 2 — 25 August 2022 8 / 13 |
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