6.42

6116SA/LA

CMOS Static RAM 2K (16K x 8-Bit)

Military, Commercial, and Industrial Temperature Ranges

7

Jul.17.20

Timing Waveform of Read Cycle No. 2(1,2,4)

Timing Waveform of Read Cycle No. 1(1,3)

Timing Waveform of Read Cycle No. 3(1,3,4)

NOTES:

1. WE is HIGH for Read cycle.

2. Device is continuously selected, CS is LOW.

3. Address valid prior to or coincident with CS transition LOW.

4. OE is LOW.

5. Transition is measured ±500mV from steady state.

ADDRESS

OE

CS

tRC

tAA

tOE

tACS

DATAOUT

tOH

tOLZ

(5)

tCLZ

(5)

tOHZ

(5)

tCHZ

(5)

3089 drw 06

DATA

VALID

tPD

ICC

ISB

tPU

VCC

Supply

Currents

,

ADDRESS

tRC

tAA

tOH

tOH

DATAOUT

3089 drw 07

PREVIOUS DATA VALID

DATA VALID

,

CS

tACS

DATAOUT

tCLZ

(5)

tCHZ

(5)

DATA VALID

3089 drw 08

,