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USB-1602HS and USB-1604HS Series

Specifications

All specifications are subject to change without notice.

Typical for 25 °C unless otherwise specified.

All signal names refer to 68 pin SCSI connector, unless otherwise specified.

Analog Input

A/D converter type: 16-bit successive approximation type

Number of channels

USB-1602HS, USB-1602HS-2AO: 2

USB-1604HS, USB-1604HS-2AO: 4

Input configuration: Single-ended

Sampling method: Simultaneous; individual A/D per channel

Input ranges: ±10 V, ±2.5 V, ±500 mV

Absolute max input voltage: ±30 V max (power on), ±20 V max (power off)

Input impedance: 10 MΩ (typ, power on)

Input bias current: < 2 µA

Input bandwidth (–3 dB): 3 MHz, typ

Crosstalk Remaining inputs grounded: 100 dB (at 100 kHz )

Pacer sources: Onboard A/D clock, XAPCR (SCCI connector), or EXT CLK (BNC

connector.) Refer to “Pacing Sources” on page 6 for details.

Trigger sources and modes: Refer to ”Trigger Sources” on page 6 for details.

Sample rate: Software-selectable.

USB-1602HS, USB-1602HS-2AO: 0.01 S/s to 2 MS/s each channel

USB-1604HS, USB-1604HS-2AO: 0.01 S/s to 1.33 MS/s each channel

Resolution: 16-bits

INL (integral non-linearity): ±2.0 LSB

DNL (differential non-linearity): ±1.0 LSB

Calibrated Accuracy

Range

Accuracy (mV)

±10 V

±1

±2.5 V

±0.5

±500 mV

±0.15

Noise Performance

Range

Counts

LSBrms

±10 V

8

1.3

±2.5 V

11

1.6

±500 mV

17

2.5

Noise distribution is determined by gathering 50,000 samples with inputs tied to

ground at the BNC connectors. Samples are gathered at the max specified rate.

Signal to Noise and Distortion (SINAD) Performance

Range

SINAD, dB

±10 V

84

±2.5 V

82

±500 mV

77

Calibrated and measured with a 10 kHz signal at 0.95 FSR, at the maximum

sampling rate.

Effective Number of Bits (ENOB) Performance

Range

Typical ENOB, bits

±10 V

14

±2.5 V

13

±500 mV

13

Calibrated and measured with a 10 kHz signal at 0.95 FSR, at the maximum

sampling rate.

Spurious-Free Dynamic Range (SFDR) Performance

Range

Typical SFDR, dB

±10 V

95

±2.5 V

95

±500 mV

95

SFDR is measured at the maximum sampling rate.

Analog Output (USB-1602HS-2AO and

USB-1604HS-2AO)

Number of channels: Two, independent (DAC 0, DAC 1)

Resolution: 16-bits

Output range: ±10 V

Throughput: Two channels, 1 MS/s each channel

Pacer sources: Internal, external, slaved to analog input pacing; refer to “Pacing

Sources” on page 6 for details.

Monotonicity: 16-bits

Glitch energy: < 12 nV/s

Current output: ±5 mA max

Output coupling: DC

Power up state: DACs clear to midscale, (0 V, ±20 mV)

Output noise: 3 mV rms max

Settling time (to .01% FS):

10 V output step, (RL=5 kΩ, CL=200 pf): 5 µS

Slew rate: 10 V/µs

Gain error: ±0.01% of FSR

Zero error: ±0.0045 V max

INL: < 2 LSBs

DNL: < 1 LSB

Offset error drift: ±10 ppm/°C

Gain error drift: ±10 ppm/°C

Analog Input Calibration

Recommended warm-up time: 15 minutes min

Calibration methods: Factory calibration and field calibration supported

System calibration interval: 1 year

System calibration references: +8.192 V, +2.048 V, +0.4096 V ±5 mV.

Actual measured values stored in EEPROM:

Tempco: 5 ppm/°C max

Long term stability: 30 ppm/1000 h

Digital Input

Number of channels: 16 inputs (DIN0-DIN15)

Digital type: 3.3 V CMOS; 5 V tolerant

Digital input transfer rate (H/W paced)

DIO-only operation: Up to 8 MHz.

DIO and AI operations:

USB-1602HS, USB-1602HS-2AO: 2 MHz

USB-1604HS, USB-1604HS-2AO: 1.33 MHz

Input high voltage: 2.0 V min, 5.5 V max

Input low voltage: 0.8 V max, 0 V min

Absolute maximum input voltage: 15 V (power-on and power-off conditions)

DIN pacing: Onboard or external clock (XAPCR)

Pacer sources: Onboard A/D clock, XAPCR (SCCI), or EXT CLK (BNC)

DIN trigger modes and sources: See “Trigger Sources” on page 6 for details.

Input pull-ups: 100 kΩ; contact us for alternative options

Latency, software paced: 115 ms, typical; system-dependant

Digital Output

Number of channels: 16 outputs (DOUT0-DOUT15)

Output rate:

No analog outputs enabled: 8 MHz max

Analog outputs enabled: 1 MHz max

Type: 3.3 V CMOS

Output high voltage (IOH = –2.5 mA): 2.4 V min, 3.4 V max

Output low voltage (IOL = 2.5 mA): 0.4 V max, 0 V min

Output current: 2.5 mA max per pin

DOUT pacing: Onboard or external clock (XDPCR)

Pacer sources: Internal, external, pacing slaved to analog input pacing; refer to

“Pacing Sources” on page 6 for details.

Power on and reset state: Low

Latency, software paced: 115 ms, typ; system-dependant

Specifications