SST26WF080BA datasheet(40/96 Pages) MICROCHIP

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SST26WF040B/040BA SST26WF080B/080BA

DS20005283C-page 40

 2014-2017 Microchip Technology Inc.

5.38

Deep Power-Down

The Deep Power-down (DPD) instruction puts the

device in the lowest power consumption mode–the

Deep Power-down mode. The Deep Power-down

instruction is ignored during an internal write operation.

While the device is in Deep Power-down mode, all

instructions will be ignored except for the Release

Deep Power-down instruction.

Enter Deep Power-down mode by initiating the Deep

Power-down (DPD) instruction (B9H) while driving CE#

low. CE# must be driven high before executing the

DPD instruction. After CE# is driven high, it requires a

delay of TDPD before the standby current ISB is reduced

to deep power-down current IDPD. See Table 5-8 for

Deep Power-down timing. If the device is busy perform-

ing an internal erase or program operation, initiating a

Deep Power-down instruction will not placed the device

in Deep Power-down mode. See Figures 5-46 and 5-47

for the DPD instruction sequence.

FIGURE 5-46:

DEEP POWER-DOWN (DPD) SEQUENCE (SQI)

FIGURE 5-47:

DEEP POWER-DOWN (DPD) (SPI)

TABLE 5-8:

DEEP POWER-DOWN

Symbol

Parameter

Min

Max

Units

TDPD

CE# High to Deep Power-down

µs

TSBR

CE# High to Standby Mode

µs

20005283 F100.0

MODE 3

SCK

SIO(3:0)

CE#

MODE 0

MSN

LSN

TDPD

Standby Mode Deep Power-Down Mode

Note: MSN= Most Significant Nibble; LSN = Least Significant Nibble

CE#

SCK

01 2 3 4 5 6 7

HIGH IMPEDANCE

MODE 0

MODE 3

20005283 F101.0

MSB

TDPD

Standby Mode Deep Power-Down Mode

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