ADIN1300CCPZ-R7 datasheet(34/79 Pages) AD

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ADIN1300

Data Sheet

Rev. 0 | Page 34 of 79

TYPICAL POWER CONSUMPTION

Table 1 and the Typical Performance Characteristics section

capture high level detail of the power consumption of the

ADIN1300 under nominal conditions and across the device

temperature range. Power consumption of a PHY depends

heavily on power supply, speed established, operating condition,

and capacitive loading on digital pins.

Power Supplies

The most significant contributor to power consumption is the

supply voltage choice and speed of operation.

The ADIN1300 can operate from a minimum of two power

supply rails, where AVDD_3P3 = VDDIO = 3.3 V and

DVDD_0P9 = 0.9 V. The VDDIO voltage requirements are

dictated by the MAC interface. While two power supply rails

result in a more simplified power strategy, the higher digital

supply voltage translates directly to higher power consumption

needs. This can be seen in Table 26, Table 27, and Table 28,

which describe the various VDDIO voltages. Using the lowest

VDDIO supply rail can achieve a savings close to 100 mW at Gb

speeds with full throughput.

Speed of Link Established

The next biggest contributor to power consumption is the speed

of the link. The ADIN1300 PHY has leading edge power

consumption figures for Gb data. Lower data links run at lower

power consumption numbers. This PHY was designed for low

power consumption when operating at Gb speeds. As a result,

10 Mbps power consumption may not be as low as comparable

offerings in the industry.

Lower Power Modes

The ADIN1300 has a number of means to lower power

consumption under conditions where the PHY is not active or

when it is linked and there is no data transmitting. Full details

on these modes are captured in the Power-Down Modes section.

Two key modes of operation to minimize power are energy

detect power-down mode, when no link is present, and EEE low

power idle mode, where a link is established but the line is idle.

The power consumption under this state is significantly

reduced compared to other idle states. Configuration of these

modes is available through the hardware configuration pins or

directly through the MDI interface. Typical power consumption

for hardware reset, EEE, and EDPD are captured in Table 26,

Table 27, and Table 28 as EEE.

Data Utilization

Table 26, Table 27, and Table 28 also capture the variation for

data utilization for the various speeds. Data is shown for 100%

data to 0% or idle state. In the idle state, the PHY is linked, but

no data transfer is taking place. The power consumption in this

state is lower than full utilization.

Table 26. Typical Current and Power Consumption for VDDIO = 1.8 V1

Mode

DVDD_0P9 Core Supply,

0.9 V (mA)

VDDIO Digital I/O Supply,

1.8 V (mA)

AVDD_3P3 PHY AFE, LED Circuit,

3.3 V (mA)

Total Power (mW)

Gb, 100% Data

70.5

330

Gb, Idle

70.5

317

100 Mbps, 100% Data

140

100 Mbps, Idle

138

10 Mbps, 100% Data

158

10 Mbps, Idle

117

EEE

Cable Unplug

COMA

1 TA = 25°C, cable length = 100 meters.

ADIN1300CCPZ-R7 Datasheet(PDF) 34 Page - Analog Devices

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