EDBA164B4PR-1DITF-R datasheet(12/152 Pages) MICRON

12 / 152 page

3. VDD2 and VDDQ are connected internally in the package.

4. The Quad die product IDD for each channel will be the sum of the IDD's for the state of

operation for each rank (CS) in the channel.

Table 5: IDD6 Full-Array Self Refresh Current at 45°C for Dual die product

VDD2, VDDQ = 1.14–1.30V; VDD1 = 1.70–1.95V

PASR

Supply

Value

Unit

Parameters/Conditions

Full array

VDD1

400

μA

All devices in self refresh

CK_t = LOW, CK_c = HIGH;

CKE is LOW;

CA bus inputs are STABLE;

Data bus inputs are STABLE

VDDQVDDQ

1600

1/2 array

VDD1

320

VDDQVDDQ

1000

1/4 array

VDD1

260

VDDQVDDQ

600

1/8 array

VDD1

240

VDDQVDDQ

400

Note:

1. IDD6 45°C is the typical of the distribution of the arithmetic mean, Quad die product will

be double these values when all die are in self refresh mode.

Table 6: IDD6 Partial-Array Self Refresh Current at 85°C for Dual die product

VDD2, VDDQ = 1.14–1.30V; VDD1 = 1.70–1.95V

PASR

Supply

Value

Unit

Parameters/Conditions

Full array

VDD1

1800

μA

All devices in self refresh

CK_t = LOW, CK_c = HIGH;

CKE is LOW;

CA bus inputs are STABLE;

Data bus inputs are STABLE

VDDQVDDQ

6400

1/2 array

VDD1

1300

VDDQVDDQ

4400

1/4 array

VDD1

1100

VDDQVDDQ

3400

1/8 array

VDD1

1000

VDDQVDDQ

2800

Note:

1. IDD6 85°C is the maximum of the distribution of the arithmetic mean, Quad die product

will be double these values when all die are in self refresh mode.

216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM

IDD Specifications

09005aef85eb530a

216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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