ADL5566ACPZ-R7 datasheet(21/24 Pages) AD

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Data Sheet

ADL5566

Rev. C | Page 21 of 24

SOLDERING INFORMATION AND RECOMMENDED

LAND PATTERN

Figure 52 shows the recommended land pattern for the ADL5566.

The ADL5566 is contained in a 4 mm × 4 mm LFCSP package,

which has an exposed ground paddle (EPAD). This paddle is

internally connected to the ground of the chip. To minimize

thermal impedance and ensure electrical performance, solder

the paddle to the low impedance ground plane on the printed

circuit board (PCB). To further reduce thermal impedance, it

is recommended that the ground planes on all layers under the

paddle be stitched together with vias.

For more information on land pattern design and layout, refer

to the AN-772 Application Note, A Design and Manufacturing

Guide for the Lead Frame Chip Scale Package (LFCSP).

This land pattern, on the ADL5566 evaluation board, provides a

measured thermal resistance (θJA) of 34.0°C/W. To measure θJA,

the temperature at the top of the LFCSP package is found with

an IR temperature gun. Thermal simulation suggests a junction

temperature 1.5°C higher than the top of package temperature.

With additional ambient temperature and I/O power measure-

ments, θJA can be determined.

13 MILS

39 MILS

12 MILS

91 MILS

13.7 MILS

19.7 MILS

Figure 52. Recommended Land Pattern

EVALUATION BOARD

Figure 53 shows the schematic of the ADL5566 evaluation board.

The board is powered by a single supply in the 3 V to 5 V range.

The power supply is decoupled by 10 µF and 0.1 µF capacitors.

The L1 and L2 inductors decouple the ADL5566 from the power

supply.

Table 7 details the various configuration options of the evaluation

board. Figure 54 and Figure 55 show the component and circuit

side layouts of the evaluation board.

The balanced input and output interfaces are converted to single

ended with a pair of baluns (M/A-COM ETC1-1-13). The baluns

at the input, T1 and T2, provide a 50 Ω single-ended-to-differential

transformation. The output baluns, T3 and T4, and the matching

components are configured to provide a 200 Ω to 50 Ω impedance

transformation with an insertion loss of about 11 dB.

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