ADL5566ACPZ-R7 datasheet(15/24 Pages) AD

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Data Sheet

ADL5566

Rev. C | Page 15 of 24

APPLICATIONS INFORMATION

BASIC CONNECTIONS

Figure 36 shows the basic connections for operating the ADL5566.

Apply a voltage between 3 V and 5 V to the VCC1 and VCC2

pins through a 5.1 nH inductor and decouple the supply side of the

inductor with at least one low inductance, 0.1 μF surface-mount

ceramic capacitor. In addition, decouple the VCOM1 and VCOM2

pins (Pin 21 and Pin 10) using a 0.1 μF capacitor. The ENBL1

and ENBL2 pins (Pin 22 and Pin 9) are tied to their amplifiers

VCC_x pin to enable each amplifier. A differential signal is

applied to Amplifier 1 through Pin 1 (VIN1) and Pin 2 (VIP1)

and to Amplifier 2 through Pin 5 (VIP2) and Pin 6 (VIN2).

Each amplifier has a gain of 16 dB.

The input pins, Pin 1 (VIN1) and Pin 2 (VIP1), and the output

pins, Pin 18 (VON1) and Pin 17 (VOP1), are biased by

applying a voltage to Pin 21 (VCOM1). If VCOM1 is left open,

VCOM1 equals ½ of VCC1. The input pins, Pin 5 (VIP2) and Pin

6 (VIN2), and the output pins, Pin 13 (VON2) and Pin 14

(VOP2), are biased by applying a voltage to VCOM2. If

VCOM2 is left open, VCOM2 equals ½ of VCC2. The ADL5566

can be ac-coupled as shown in Figure 36 or can be dc-coupled if

within the specified input and output common-mode voltage

ranges (see the Circuit Description section). To enable the

ADL5566, the ENBL1 and ENBL2 pins must be pulled high.

Pulling the ENBL1/ENBL2 pins low puts the ADL5566 in sleep

mode, reducing the current consumption to 7 mA at ambient.

A series 5.1 nH inductor can be connected to the VCCx pins with

the VCC decoupling capacitor connected to the VCC bus side (see

Figure 36 and Figure 53). This inductor with the internal

capacitance of the amplifier results in a two pole low-pass

network and reduces the amplifier VCC noise.

BALANCED

SOURCE

½ RS

0.01µF

BALANCED

LOAD

VIP1

VIN1

0.01µF

VON1

VCOM1

VOP1

0.01µF

VCC2

0.01µF

10µF

VCC

ENBL1

ENBL2

VCC

0.01µF

VCC1

ADL5566

5.1nH

BALANCED

SOURCE

½ RS

0.01µF

BALANCED

LOAD

VIP2

VIN2

0.01µF

VON2

VCOM2

VOP2

0.01µF

NOTES

1. EXPOSED PADDLE IS INTERNALLY CONNECTED TO GND AND MUST BE SOLDERED

TO A LOW IMPEDANCE GROUND PLANE.

EXPOSED PAD

Figure 36. Basic Connections

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