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WM8803CDT/V Datasheet(PDF) 9 Page - Wolfson Microelectronics plc |
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WM8803CDT/V Datasheet(HTML) 9 Page - Wolfson Microelectronics plc |
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9 / 45 page ![]() Product Preview WM8803 w PP Rev 1.1 September 2003 9 DEVICE DESCRIPTION SYSTEM RESET ( _____ PD) The system operates normally when PD is set to high level after applying a supply voltage of 2.7V(3.0V) or higher. Following power ON, the system is reset by setting PD to low level again. System reset is enabled by setting PDB at power on. If a crystal oscillator is used, after setting PD low level and then high level, at least 10ms should be allowed before starting normal operation until the oscillator element is stable. VDD PD System reset System operation 2.7V 2.0V t > µµµµ200 sec t Figure 3 PD Pin Levels at Power On LOW POWER MODES The WM8803 not only supports a total system power down mode controlled with the PD pin but also provides low-power modes in which only certain functions operate. These low power modes are controlled by PDOWN[1:0]. The “power down” mode controlled by the PD pin applies to all circuits in the WM8803. All clocks are stopped and the registers are initialized. The XIN and XOUT pins continue to operate in the PDOWN[1:0] controlled low power mode, which stops all circuits other than the oscillator amplifier. The XOUT signal can be used as the master clock for a DSP or other circuits. The CLKOUT, BCLK, LRCLK, SDATO, SDIN, XIN and XOUT pins continue to operate in the PDOWN[1:0] controlled low power mode, which stops all circuits other than the oscillator amplifier and the divider circuit . This mode can be used to minimize power consumption during analogue data reception. In a low power mode set with the PDOWN[1:0] and with the oscillator amplifier stopped by setting AMPOPR, it will not be possible for the WM8803 to provide a clock output. The AMPOPR overrides all other oscillator settings. Note that the PLLOPR setting is invalid and the PLL circuit will be stopped. When a low power mode is set up with the PDOWN[1:0], it is possible to write to the micro-controller registers. However, all the sub-code Q and channel status data will read out as zeros. |
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