FT121Q-R datasheet(12/46 Pages) FTDI

12 / 46 page

Document No.: FT_000648

FT121 ENHANCED USB DEVICE CONTROLLER WITH SPI SLAVE IC

Datasheet Version 1.2

Clearance No.: FTDI#

312

Figure 4-3 4-wire read operation

4.3.3 3-wire write operation

When the SPI master performs a data write operation, it drives the SS_n line low, sends the 8-bit

command byte on MOSI line, followed by sending the data bytes. The length of the data byte ranges from

0 to maximum 506, depending on the command type. The master will signal the end of the data write

operation by drive the SS_n line high.

Figure 4-4 3-wire write operation

4.3.4 3-wire read operation

When the SPI master performs a data read operation, it drives the SS_n line low andsends the 8-bit

command byte on MOSI line. The master will stop driving the MOSI line. The FT121 will output data bytes

on the MOSI line. The length of the data byte ranges from 0 to maximum 506, depending on the

command type. The master will signal the end of the data read operation by drive the SS_n line high.

Figure 4-5 3-wire read operation

It is important that bus contention should be avoided during the bus turnaround period – i.e. moving

from the command byte to a read byte. In this instance the master will stop driving at the same clock

edge (rising edge) as the slave starts to drive. To avoid bus contention the FT121 will implement delays

so that it only starts to drive the MOSI line at least 5ns after the SCLK driving edge – this will give the

master a minimum of 5ns to stop driving MOSI, which should ensure no bus contentions. At this bus

turnaround point it’s also more natural for a clash not to occur, as the master is the source of the clock,

so will drive the clock and MOSI off at similar times. For the slave to drive MOSI it has to pass the clock

FT121Q-R Datasheet(PDF) 12 Page - Future Technology Devices International Ltd.