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T89C51CC02CA-RATIM Datasheet(PDF) 44 Page - ATMEL Corporation |
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T89C51CC02CA-RATIM Datasheet(HTML) 44 Page - ATMEL Corporation |
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44 / 154 page  44 T89C51CC02 4126H–CAN–01/05 Table 29. Read MOVC A, @DPTR Code Execution FCON Register ENBOOT DPTR FM1 FM0 XROW Hardware Byte FMOD1 FMOD0 FPS From FM0 00 X 0 0000h to 3FFFh winner 1 0000h to 3FFFh winner F800h to FFFFh Do not use this configuration 01 X X 0000 to 007Fh See (1) winner 1 0 X X X winner 11 X 0 000h to 3FFFh winner 1 0000h to 3FFFh winner F800h to FFFFh Do not use this configuration From FM1 (ENBOOT =1 00 0 1 0000h to 3FFF winner F800h to FFFFh winner 0X NA 1 1 X winner 0X NA 01 X 1 0000h to 007h See (2) winner 0NA 10 X 1 X winner 0NA 11 X 1 000h to 3FFFh winner 0NA 1. For DPTR higher than 007Fh only lowest 7 bits are decoded, thus the behavior is the same as for addresses from 0000h to 007Fh 2. For DPTR higher than 007Fh only lowest 7 bits are decoded, thus the behavior is the same as for addresses from 0000h to 007Fh |
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