STM32F479II datasheet(37/208 Pages) STMICROELECTRONICS

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STM32F479xx

Functional overview

main clock, it can operate in Stop and Standby modes. It can be used either as a watchdog

to reset the device when a problem occurs, or as a free-running timer for application timeout

management. It is hardware- or software-configurable through the option bytes.

2.24.5

Window watchdog

The window watchdog is based on a 7-bit downcounter that can be set as free-running. It

can be used as a watchdog to reset the device when a problem occurs. It is clocked from

the main clock. It has an early warning interrupt capability and the counter can be frozen in

debug mode.

2.24.6

SysTick timer

This timer is dedicated to real-time operating systems, but could also be used as a standard

downcounter. It features:

•

A 24-bit downcounter

•

Autoreload capability

•

Maskable system interrupt generation when the counter reaches 0

•

Programmable clock source.

2.25

Inter-integrated circuit interface (I2C)

Up to three I²C bus interfaces can operate in multimaster and slave modes. They can

support the standard (up to 100 KHz), and fast (up to 400 KHz) modes. They support the

7/10-bit addressing mode and the 7-bit dual addressing mode (as slave). A hardware CRC

generation/verification is embedded.

They can be served by DMA and they support SMBus 2.0/PMBus.

The devices also include programmable analog and digital noise filters (see Table 7).

2.26

Universal synchronous/asynchronous receiver transmitters

(USART)

The devices embed four universal synchronous/asynchronous receiver transmitters

(USART1, USART2, USART3 and USART6) and four universal asynchronous receiver

transmitters (UART4, UART5, UART7, and UART8).

These six interfaces provide asynchronous communication, IrDA SIR ENDEC support,

multiprocessor communication mode, single-wire half-duplex communication mode and

have LIN Master/Slave capability. The USART1 and USART6 interfaces are able to

communicate at speeds of up to 11.25 Mbit/s. The other available interfaces communicate

at up to 5.62 bit/s.

Table 7. Comparison of I2C analog and digital filters

Analog filter

Digital filter

Pulse width of

suppressed spikes

≥ 50 ns

Programmable length from 1 to 15

I2C peripheral clocks

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