STM32F479II datasheet(90/208 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32F479xx

90/208

DocID028010 Rev 2

V12

Regulator ON: 1.2 V internal

voltage on VCAP_1/VCAP_2 pins

Power Scale 3 ((VOS[1:0] bits in

PWR_CR register = 0x01), 120 MHz

HCLK max frequency

1.08 1.14

1.20

Power Scale 2 ((VOS[1:0] bits in

PWR_CR register = 0x10), 144 MHz

HCLK max frequency with over-drive OFF

or 168 MHz with over-drive ON

1.20 1.26

1.32

Power Scale 1 ((VOS[1:0] bits in

PWR_CR register = 0x11), 168 MHz

HCLK max frequency with over-drive OFF

or 180 MHz with over-drive ON

1.26 1.32

1.40

Regulator OFF: 1.2 V external

voltage must be supplied from

external regulator on

VCAP_1/VCAP_2 pins(6)

Max frequency 120 MHz

1.10 1.14

1.20

Max frequency 144 MHz

1.20 1.26

1.32

Max frequency 168 MHz

1.26 1.32

1.38

VIN

Input voltage on RST and FT

pins(7)

≤VDD ≤3.6 V

− 0.3

5.5

VDD ≤2V

− 0.3

5.2

Input voltage on TTa pins

− 0.3

VDDA

+0.3

Input voltage on BOOT0 pin

Power dissipation at TA = 85 °C

for suffix 6 or TA = 105 °C for

suffix 7(8)

WLCSP168

645

UFBGA169

385

LQFP176

526

UFBGA176

513

LQFP208

1053

TFBGA216

690

Ambient temperature for 6

suffix version

Maximum power dissipation

− 40

°C

Low power dissipation(9)

− 40

105

Ambient temperature for 7

suffix version

Maximum power dissipation

− 40

105

Low power dissipation(9)

− 40

125

Junction temperature range

6 suffix version

− 40

105

7 suffix version

− 40

125

1. The over-drive mode is not supported at the voltage ranges from 1.7 to 2.1 V.

2. VDD/VDDA minimum value of 1.7 V is obtained with the use of an external power supply supervisor (refer to Section 2.19.2).

3. When the ADC is used, refer to Table 77.

4. If VREF+ pin is present, it must respect the following condition: VDDA-VREF+ < 1.2 V.

5. It is recommended to power VDD and VDDA from the same source. A maximum difference of 300 mV between VDD and

VDDA can be tolerated during power-up and power-down operation.

6. The over-drive mode is not supported when the internal regulator is OFF.

7. To sustain a voltage higher than VDD+0.3, the internal Pull-up and Pull-Down resistors must be disabled

8. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJmax.

9. In low power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax.

Table 17. General operating conditions (continued)

Symbol

Parameter

Conditions(1)

Min

Typ

Max

Unit

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